Configuration - Fujitsu MB91460 SERIES FR60 User Manual

Chapter 9 Reset
3.Configuration
• A settings initialization reset (INIT) is followed by an operation reset (RST) after the oscillation
stabilization time elapses.

3. Configuration

State transition control circuit (reset related)
OSCD1 STCR: bit1
0 0
Main clock continues to operate during stop mode
1 1
Main clock halts during stop mode
HIZ
0 0
Maintain pin states during stop mode
1 1
Set pins to high impedance during stop mode
SRST
0 0
Trigger software reset
1 1
Do not trigger software reset
INIT
INIT
0 0
1 1
SRST
0 0
1 1
WDOG
0 0
1 1
RSRR/STCR
140
Figure 3-1 Configuration Diagram
SLEEP
0 0
Do not change to sleep mode
1 1
Change to sleep mode
STOP STOP
0 0 0
Do not change to stop mode
STCR: bit1
1 1 1
Change to stop mode
STCR: bit0 STCR: bit0
Internal interrupts, external interrupts
STCR: bit4 STCR: bit4
RSRR: bit7 RSRR: bit7
No INIT pin input
INIT pin input occurred
RSRR: bit RSRR: bit3
No software reset (RST) RS T)
Software reset (RST) occurred RS T)
RSRR: bit5 RSRR: bit5
No watchdog timeout
Watchdog timeout (INIT) occurred (INIT)
Figure 3-2 Register List
MOD0
MOD1
MOD2
STCR: bit7 STCR: bit7
STCR: bit7 STCR: bit7 STCR: bit7
State
transition
control
circuit
Clear counter and
start oscillation
stabilization wait
Time-base counter
(oscillation stabilization wait)
Watchdog timer
Sleep signal
Stop signal
Clock control
Pin control
Initialization reset (INIT)
Operation reset (RST)
Oscillation stabilization wait ended