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Chapter 36 Input Capture
5.Operation
5. Operation
The input capture operation is described below.
5.1 Capture Timing, Interrupt Timing
FFFFh
Free-run
timer 0
count
0000 h
Reset
Input
capture
Interrupt
request
(1) Rising edge of input signal
(2) Internal signal generated by edge detection (synchronous with peripheral clock)
(3) Store free-run timer value in capture register (capture)
(4) Input capture interrupt generation (ICU0-ICU1="1")
752
Input capture
Peripheral
clock (CLKP)
Active edge
Free-run timer 0
N
N
Capture register
Interrupt
request
(1)
(2)
N+1
N+1
(3)
N+1
N+1
N+1
(4)
Time
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