Endian And Bus Access - Fujitsu MB91460 SERIES FR60 User Manual

4. Endian and Bus Access

There is a one-to-one correspondence between the WR0-WR3 control signal and the byte loca-
tion regardless of the endian method (big or little) and the data bus width. The following sum-
marizes the location of bytes on the data bus of the MB91460 series used according to the
specified data bus width and the corresponding control signal for each bus mode.
■ Relationship between Data Bus Width and Control Signal
This section summarizes the location of bytes on the data bus used according to the specified data bus width and
the corresponding control signal for each bus mode.
● Ordinary bus interface
Figure 4-1 Data Bus Width and Control Signal on the Ordinary Bus Interface
a) 32-bit bus width
data bus Control signal
D31
D0
● Time division I/O interface
Figure 4-2 Data Bus Width and Control Signal in the Time Division I/O Interface
a) 16-bit bus width
data bus
D31
D16
b) 16-bit bus width
data bus
WR0
(UUB)
WR1
(ULB)
WR2
(LUB)
WR3
(LLB)
(D15 to 0 are not used)
Control signal
A15 to 8
A7 to 0
- -
- -
(D15 to 0 are not used)
Control signal
WR0
(UUB)
WR1
(ULB)
- -
- -
b) 8-bit bus width
data bus Control signal
WR0
WR1
-
- -
- -
(D23 to 0 are not used)
Chapter 31 External Bus
4.Endian and Bus Access
c) 8-bit bus width
data bus Control signal
WR0
(UUB)
- -
- -
- -
(D23 to 0 are not used)
A7 to 0 WR0
- -
- -
- -
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