Chapter 24 Interrupt Control
1. Overview
Interrupt control manages interrupt reception and arbitration.
Priority judging circuit
Interrupt requests
(peripheral function,
INT instruction, and
delayed interrupt)
2. Features
• Functions
• Detection of interrupt requests
• Priority determination (determined by level and number)
• Interrupt level propagation of the factor of the priority to the CPU
• Interrupt number propagation of the factor of the priority to the CPU
• Request (to the CPU) to return from stop mode by a valid interrupt (Wakeup)
• Interrupt level
• Reserved for System: level 0 to 14
• MNI
• Interrupt
• Interrupt disable
• Number of interrupt triggers
• NMI
• Interrupt from peripheral functions: 128
• Delayed interrupt
• Reserved for system (for REALOS): 2
• INT instruction
Wakeup
NMI
NMI processing
Interrupt
priority
judging circuit
: level 15
: level 16 to 31
: level 32
(As the interrupt level goes up, the number goes down.)
: 1
: 1
: 111
Interrupt level/
interrupt vector
generator
HLDREQ
cancel
request
Vector number
Chapter 24 Interrupt Control
Level
HALT
To the CPU
1.Overview
311