Chapter 20 Software Watchdog Timer; Overview; Features - Fujitsu MB91460 SERIES FR60 User Manual

Chapter 20 Software Watchdog Timer

1. Overview

The software watchdog timer consists of a selector that uses the output from a 26-bit timebase counter using
the base clock (F) and a one-bit counter.
The watchdog timer generates the watchdog reset (initial setting reset) if the generation delay operation (an
interval watchdog reset) is disabled due to problems such as program runaway.
ƒEƒHƒbƒ`ƒhƒbƒO§Œä • " Watchdog control section
ƒ^ƒCƒƒx[ƒX Timebase
ƒJƒEƒ"ƒ^ counter
ƒx[ƒX Base
clock ƒNƒ ƒbƒN
(f) i ƒ³j

2. Features

■ Watchdog timer
• Type : Generates the watchdog reset (INIT) with the overflow from one-bit counter
• Quantity : 1
• Count clock (interval time): Bit output from the timebase timer
20
4 types 2 /F
F
(Can be set only once after the reset (RST).)
• Clearing 1-bit counter:
Successively writes "A5""5A" to watchdog reset generation delay register WPR by the software.
• Operation start/stop: This timer starts to operate once it writes data to the watchdog control register RSRR
for the first time after the reset (RST). This timer stops only by the reset (RST).
26-bit counter 26 ƒrƒbƒgƒJƒEƒ"ƒ^
22 24 26
, 2 /F , 2 /F , 2 /F
F F
Watchdog timer ƒEƒHƒbƒ`ƒhƒbƒOƒ^ƒCƒ}
Selector ƒZƒŒƒNƒ^
Counter ƒJƒEƒ"ƒ^
Timebase timer ƒ^ƒCƒƒx[ƒXƒ^ƒCƒ}
F
Chapter 20 Software Watchdog Timer
Watchdog ƒEƒHƒbƒ`
reset ƒhƒbƒO
ƒŠƒZƒbƒg
1.Overview
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