Configuration - Fujitsu MB91460 SERIES FR60 User Manual

Chapter 10 Standby
3.Configuration

3. Configuration

SYNCS TB CR: bit0
0
Setting prohibited
1
Synchronous standby
OSCD1 STCR: bit0
0
Do not halt main clock oscillation during stop mode.
1
Halt main clock oscillation during stop mode.
HIZ STCR: bit5
0
Maintain same states during stop mode.
1
Set pins to high impedance during stop mode.
SRST STCR: bit4
0
Generate software reset.
1
Do not generate software reset.
INIT
INIT
0
1
SRST
0
1
WDOG
0
1
Standby control
156
Figure 3-1 Configuration Diagram
SLEEP STCR: bit7
0
Do not change to sleep mode.
1
Change to sleep mode.
STOP STCR: bit7
0
Do not change to stop mode.
1
Change to stop mode.
Internal interrupts,
external interrupts
RSRR: bit7
No INIT pin input
INIT pin input occurred (INIT)
RSRR: bit3
No software reset (RST)
Software reset (RST) occurred
RSRR: bit5
No watchdog timeout
Watchdog timeout (INIT) occurred
Figure 3-2 Register List
State
transition
control
circuit
Oscillation stabilization
Counter cleared,
wait finished
oscillation
stabilization
wait
Time-base counter
(oscillation stabilization wait)
Watchdog timer
Sleep signal
Stop signal
Clock control
Pin control
Initialize settings (INIT)
Initialize operation (RST)