Omron CP - PROGRAMMING MANUAL 05-2007 Programming Manual page 474

Logic Instructions
Variations
Applicable Program Areas
Operand Specifications
Description
Flags
Variations Executed Each Cycle for ON Condition
Executed Once for Upward Differentiation
Executed Once for Downward Differentiation Not supported.
Immediate Refreshing Specification
Block program areas
OK
Area
CIO Area
Work Area
Holding Bit Area
Auxiliary Bit Area
Timer Area
Counter Area
DM Area
Indirect DM addresses
in binary
Indirect DM addresses
in BCD
Constants
Data Registers
Index Registers
Indirect addressing
using Index Registers
ORWL(611) takes the logical OR of data specified in I
data and outputs the result to R, R+1.
• When any of the corresponding bits in I
be output to the corresponding bit it R+1. When any of them are 0, a 0 will
be output to the corresponding bit in R+1.
(I I +1) + (I I +1) (R, R+1)
1, 1 2, 2
I I +1 I
1, 1 2,
1
1
0
0
Name Label
Error Flag ER
Equals Flag =
Negative Flag N
Step program areas
OK OK
I
1
CIO 0 to CIO 6142
W0 to W510
H0 to H510
A0 to A958
T0000 to T4094
C0000 to C4094
D0 to D32766
@ D0 to @ D32767
*D0 to *D32767
#00000000 to #FFFFFFFF (binary)
---
---
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
I
1, 1
I +1 R, R+1
2
1 1
0 1
1 1
0 0
Operation
OFF
ON when the result is 0.
OFF in all other cases.
ON when the leftmost bit of R is 1.
OFF in all other cases.
Section 3-12
ORWL(611)
@ORWL(611)
Not supported.
Subroutines Interrupt tasks
OK
I R
2
A448 to A958
---
and I as double-word
1 2
+1, I and I +1are 1, a 1 will
2, 2
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