Omron CP - PROGRAMMING MANUAL 05-2007 Programming Manual page 340

Cp1h/cp1l cpu unit
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Data Shift Instructions
3-8-20 SHIFT N-BIT DATA RIGHT: NSFR(579)
Purpose
Ladder Symbol
Variations
Applicable Program Areas
Operands
Note
Operand Specifications
Shifts the specified number of bits to the right.
NSFR(579)
D: Beginning word for shift
D
C: Beginning bit
C
N: Shift data length
N
Variations
Executed Each Cycle for ON Condition
Executed Once for Upward Differentiation
Executed Once for Downward Differentiation Not supported
Immediate Refreshing Specification
Block program areas
OK
OK
C: 0000 to 000F hex (0 to 15)
N: 0000 to FFFF hex (0 to 65535)
All words in the shift register must be in the same area.
Area
CIO Area
Work Area
Holding Bit Area
Auxiliary Bit Area
Timer Area
Counter Area
DM Area
Indirect DM addresses
in binary
Indirect DM addresses
in BCD
Constants
Data Registers
Index Registers
Indirect addressing
using Index Registers
Step program areas
Subroutines
OK
D
CIO 0 to CIO 6143
W0 to W511
H0 to H511
A448 to A959
A0 to A959
T0000 to T4095
C0000 to C4095
D0 to D32767
@ D0 to @ D32767
*D0 to *D32767
---
#0000 to #000F
(binary) or &0 to
&15
---
DR0 to DR15
---
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
Section 3-8
NSFR(579)
@NSFR(579)
Not supported
Interrupt tasks
OK
C
N
#0000 to #FFFF
(binary) or &0 to
&65535
307

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