Omron CP - PROGRAMMING MANUAL 05-2007 Programming Manual page 229

Cp1h/cp1l cpu unit
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Timer and Counter Instructions
3-5-8
REVERSIBLE COUNTER: CNTR(012)/CNTRX(548)
Purpose
Ladder Symbol
Variations
Applicable Program Areas
Operands
196
Counter PVs are retained even through a power interruption. If you want to
restart counting from the SV instead of resuming the count from the retained
PV, add the First Cycle Flag (A200.11) as a reset input to the counter.
First Cycle Flag
(A200.11)
CNTR(012)/CNTRX(548) operates a reversible counter.
BCD
Increment input
Decrement input
Reset input
Binary
Increment input
CNTRX(548)
Decrement input
Reset input
Variations
Executed Each Cycle for ON Condition
Executed Once for Upward Differentiation
Executed Once for Downward Differentiation Not supported.
Immediate Refreshing Specification
Block program areas
Not allowed
OK
N: Counter Number
The counter number must be between 0000 and 4095 (decimal).
S: Set Value
Data
BCD
#0000 to #9999
Binary
&0 to &65535 (decimal)
#0000 to #FFFF (hex)
CNTR(012)
N
N: Counter number
S
S: Set value
N: Counter number
N
S: Set value
S
Step program areas
Subroutines
OK
Range
Section 3-5
CNTR(012)/
CNTRX(548)
Not supported.
Not supported.
Interrupt tasks
OK

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