Omron CP - PROGRAMMING MANUAL 05-2007 Programming Manual page 129

Sequence Input Instructions
Description
Flags
Precautions
Example
96
Area
Clock Pulses 0.02 s, 0.1 s, 0.2 s, 1 s, 1 min
TR Area ---
DM Area ---
Indirect DM addresses ---
in binary
Indirect DM addresses ---
in BCD
Constants ---
Data Registers ---
Index Registers ---
Indirect addressing ,IR0 to ,IR15
using Index Registers
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
AND NOT is used for a normally closed bit connected in series. AND NOT
cannot be directly connected to the bus bar, and cannot be used at the begin-
ning of a logic block. If there is no immediate refreshing specification, the
specified bit in I/O memory is read. If there is an immediate refreshing specifi-
cation, the status the CPU Unit's input terminals is read.
There are no flags affected by this instruction.
Immediate refreshing (!) can be specified for AND NOT. An immediate refresh
instruction updates the status of the input bit for CPU Unit built-in inputs just
before the instruction is executed.
0.00 0.01 0.02
0.04
Instruction
LD
AND
LD
AND
LD
AND NOT
OR LD
AND LD
OUT
AND NOT bit operand
100.00
0.03
0.05
Operand
0.00
0.01
0.02
0.03
0.04
0.05
---
---
100.00
Section 3-2