Sequence Input Instructions; Load: Ld - Omron CP - PROGRAMMING MANUAL 05-2007 Programming Manual

Sequence Input Instructions

CP1H and CP1L M CPU Units
DM Area
Indirect DM addresses in
binary
Indirect DM addresses in
BCD
3-2 Sequence Input Instructions
3-2-1

LOAD: LD

Purpose
Ladder Symbol
Variations
Applicable Program Areas
Operand Specifications
The following table shows example DM Area ranges in the CP1L L CPU Units.
D00000 to D32767
@D00000 to @D32767
*D00000 to *D32767
Indicates a logical start and creates an ON/OFF execution condition based on
the ON/OFF status of the specified operand bit.
Bus bar
Variations Restarts Logic and Creates ON Each Cycle
Operand Bit is ON
Restarts Logic and Creates ON Once for
Upward Differentiation
Restarts Logic and Creates ON Once for
Downward Differentiation
Immediate Refreshing Specification
Combined Refreshes Input Bit, Restarts Logic, and
Variations Creates ON Once for Upward Differentiation
Refreshes Input Bit, Restarts Logic, and
Creates ON Once for Downward Differentiation
Block program areas
OK
Area
CIO Area
Work Area
Holding Bit Area
Auxiliary Bit Area
Timer Area
Counter Area
Task Flag Area
Condition Flags
Clock Pulses
TR Area
DM Area
CP1L L CPU Units
DM Area
Indirect DM addresses in
binary
Indirect DM addresses in
BCD
Starting point of block
Step program areas
OK OK
LD operand bit
CIO 0.00 to CIO 6143.15
W0.00 to W511.15
H0.00 to H511.15
A0.00 to A959.15
T0000 to T4095
C0000 to C4095
TK00 to TK31
ER, CY, N, OF, UF, >, =, <, >=, <>, <=, A1, A0
0.0 2s, 0.1 s, 0.2 s, 1 s, 1 min
TR0 to TR15
---
Section 3-2
D00000 to D09999,
D32000 to D32767
@D00000 to @D09999,
@D30000 to @D32767
*D00000 to *D09999,
*D30000 to *D32767
LD
@LD
%LD
!LD
!@LD
!%LD
Subroutines Interrupt tasks
OK
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