Omron CP - PROGRAMMING MANUAL 05-2007 Programming Manual page 240

Timer and Counter Instructions
Example
1,2,3...
The timer or counter instruction will not be executed if the PLC memory
address in the specified Index Register is not the address of a timer or counter
PV.
Using Index Registers to indirectly address timers and counters can reduce
the size of the program and increase flexibility. For example, common subrou-
tines can be created.
The following example shows a program section that uses indirect addressing
to define and start 100 timers with SVs contained in D100 through D199. IR0
contains the PLC memory address of the timer PV and IR1 contains the PLC
memory address of the timer Completion Flag.
DM address Content
D100 0010
D101 0100
D102 0050
. .
. .
. .
D199 0999
P_On
(Always ON
Flag)
P_On
(Always ON
Flag)
1. MOVRW(561) moves the PLC memory address of the PV for timer T0000
to IR0. Afterwards IR0 can be used in place of the timer number.
Function
SV for T0000
SV for T0001
SV for T0002
.
.
.
SV for T0099
1
2
3
2000.00
4
&100
D0
FOR
&100
5
@D0
++
D0
NEXT
Section 3-5
207