Omron CP - PROGRAMMING MANUAL 05-2007 Programming Manual page 987

Failure Diagnosis Instructions
1,2,3...
Register Word Functions
954
Input bits in LD, LD NOT, AND, AND NOT, OR, and OR NOT instructions
(including differentiated and immediate-refreshing variations) will be checked
by the logic diagnosis function. Input bits in other instructions and operands
addressed indirectly through Index Registers will not be checked.
The logic diagnosis block begins with the first LD (not LD TR) or LD NOT
instruction after FPD(269) and ends with the first OUT (not OUT TR) or other
right-hand instruction.
There are two diagnostic output modes, set with the leftmost digit of C.
1. Bit address output mode (Leftmost digit of C = 0)
Bit 15 of R (the Bit Address Found Flag) is turned ON when an input bit
address has been found and bit 14 of R indicates whether the input is nor-
mally ON or normally OFF.
The 8-digit hexadecimal PLC memory address of the input bit is output to
R+3 and R+2.
2. Bit address and message output mode (Leftmost digit of C = 8)
Bit 15 of R (the Bit Address Found Flag) is turned ON when an input bit
address has been found and bit 14 of R indicates whether the input is nor-
mally ON or normally OFF.
The input bit's address is output to R+2 through R+4 as 6 ASCII charac-
ters.
The register words contain the results of the diagnostic function and can also
contain an ASCII error message which is displayed when an error is gener-
ated by the time monitoring function. The function of the register words
depends upon the diagnostic output mode which is set with the leftmost digit
of C.
Bit Address Output (C=0@@@)
When the leftmost digit of C is set to 0, the 8-digit hexadecimal PLC memory
address of the input bit is output to R+2 and R+3. R contains two flags which
indicate whether an input bit has been found and whether it is used in a nor-
mally open or normally closed input condition.
15 14 13
R
Input type
0: Normally open
1: Normally closed
Bit Address Found Flag
0: Not found yet
1: Bit address found
15
R+1
Not possible to use.
R+2
Bit Address and Message Output (C=8@@@)
When the leftmost digit of C is set to 8, the ASCII address of the input bit is
output to R+2 to R+4. R contains two flags which indicate whether an input bit
has been found and whether it is used in a normally open or normally closed
input condition.
0
Not possible to use.
0
R+3
Section 3-28