Tr Bits - Omron CP - PROGRAMMING MANUAL 05-2007 Programming Manual

Cp1h/cp1l cpu unit
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Sequence Input Instructions

3-2-11 TR Bits

0.00
Using TR0 to TR15
TR0 to TR15
Considerations
TR bits are used to temporarily retain the ON/OFF status of execution condi-
tions in a program when programming in mnemonic code. They are not used
when programming directly in ladder program form because the processing is
automatically executed by the CX-Programmer. The following diagram shows
a simple application using two TR bits.
0.01
0.02
0.03
0.04
0.05
TR0 to TR15 are used only with LOAD and OUTPUT instructions. There are
no restrictions on the order in which the bit addresses are used.
Sometimes it is possible to simplify a program by rewriting it so that TR bits
are not required. The following diagram shows one case in which a TR bit is
unnecessary and one in which a TR bit is required.
In instruction block (1), the ON/OFF status at point A is the same as for output
CIO 100.00, so AND 0.01 and OUT 100.01 can be coded without requiring a
TR bit. In instruction block (2), the status of the branching point and that of
output CIO 100.02 are not necessarily the same, so a TR bit must be used. In
this case, the number of steps in the program could be reduced by using
instruction block (1) in place of instruction block (2).
TR bits are used only for retaining (OUT TR0 to TR15) and restoring (LD TR0
to TR15) the ON/OFF status of branching points in programs with many out-
put branches. They are thus different from general bits, and cannot be used
with AND or OR instructions, or with instructions that include NOT.
Address
Instruction Operands
100.00
00200
LD
00201
OUT
100.01
00202
AND
00203
OUT
100.02
00204
AND
00205
OUT
100.03
00206
LD
00207
AND
00208
OUT
00209
LD
00210
AND
00211
OUT
00212
LD
00213
AND NOT
00214
OUT
Section 3-2
0.00
TR0
0.01
TR1
0.02
100.00
TR1
0.03
100.01
TR0
0.04
100.02
TR0
0.05
100.03
107

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