The Status Model - HP 8163A Programming Manual

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Introduction to Programming

The Status Model

The SESR contains the information about events that are not slot
specific. For details of the function of each bit of the SESR, see
"Standard Event Status Register" on page 32.
The SESEM allows you to choose the event that may affect the ESB
of the Status Byte. If you set a bit of the SESEM to zero, the
corresponding event cannot affect the ESB. The default is for all the
bits of the SESEM to be set to 0.
The questionable and operation status systems set the Operational
Status Bit (OSB) and the Questionable Status Bit (QSB). These
status systems are described in "The Status Model" on page 27
"Status Reporting – The STATus Subsystem" on page 56.
Unused bits in any of the registers change to 0 when you read them.
1.5 The Status Model
Each node of the status circuitry has three registers:
• A condition register (CONDition), which contains the current
status. This register is updated continuously. It is not changed by
having its contents read.
• The event register (EVENt), which contains details of any
positive transitions in the corresponding condition register, that
is, when a bit changes from 0 → 1. The contents of this register
are cleared when it is read. The contents of any higher-level
registers are affected with regard to the appropriate bit.
• The enable register (ENABle), which enables changes in the
event register to affect the next stage of registers.
The event register is the only kind of register that can affect the next
stage of registers.
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