Xilinx VCU1287 User Manual page 79

Characterization board
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set_property PACKAGE_PIN AB10
set_property PACKAGE_PIN AD11
set_property PACKAGE_PIN AD10
set_property PACKAGE_PIN AB7
set_property PACKAGE_PIN AB6
set_property PACKAGE_PIN AB2
set_property PACKAGE_PIN AB1
set_property PACKAGE_PIN AC9
set_property PACKAGE_PIN AC8
set_property PACKAGE_PIN AC4
set_property PACKAGE_PIN AC3
set_property PACKAGE_PIN AD7
set_property PACKAGE_PIN AD6
set_property PACKAGE_PIN AD2
set_property PACKAGE_PIN AD1
set_property PACKAGE_PIN AE9
set_property PACKAGE_PIN AE8
set_property PACKAGE_PIN AE4
set_property PACKAGE_PIN AE3
set_property PACKAGE_PIN V11
set_property PACKAGE_PIN V10
set_property PACKAGE_PIN Y11
set_property PACKAGE_PIN Y10
set_property PACKAGE_PIN V7
set_property PACKAGE_PIN V6
set_property PACKAGE_PIN V2
set_property PACKAGE_PIN V1
set_property PACKAGE_PIN W9
set_property PACKAGE_PIN W8
set_property PACKAGE_PIN W4
set_property PACKAGE_PIN W3
set_property PACKAGE_PIN Y7
set_property PACKAGE_PIN Y6
set_property PACKAGE_PIN Y2
set_property PACKAGE_PIN Y1
set_property PACKAGE_PIN AA9
set_property PACKAGE_PIN AA8
set_property PACKAGE_PIN AA4
set_property PACKAGE_PIN AA3
set_property PACKAGE_PIN P11
set_property PACKAGE_PIN P10
set_property PACKAGE_PIN T11
set_property PACKAGE_PIN T10
set_property PACKAGE_PIN P7
set_property PACKAGE_PIN P6
set_property PACKAGE_PIN P2
set_property PACKAGE_PIN P1
set_property PACKAGE_PIN R9
set_property PACKAGE_PIN R8
set_property PACKAGE_PIN R4
set_property PACKAGE_PIN R3
set_property PACKAGE_PIN T7
set_property PACKAGE_PIN T6
set_property PACKAGE_PIN T2
set_property PACKAGE_PIN T1
set_property PACKAGE_PIN U9
set_property PACKAGE_PIN U8
set_property PACKAGE_PIN U4
set_property PACKAGE_PIN U3
VCU1287 Characterization Board
UG1121 (v1.0) December 11, 2015
Appendix Appendix C:
[get_ports "228_REFCLK1_N"]
[get_ports "228_REFCLK0_P"]
[get_ports "228_REFCLK0_N"]
[get_ports "228_TX3_P"]
[get_ports "228_TX3_N"]
[get_ports "228_RX3_P"]
[get_ports "228_RX3_N"]
[get_ports "228_TX2_P"]
[get_ports "228_TX2_N"]
[get_ports "228_RX2_P"]
[get_ports "228_RX2_N"]
[get_ports "228_TX1_P"]
[get_ports "228_TX1_N"]
[get_ports "228_RX1_P"]
[get_ports "228_RX1_N"]
[get_ports "228_TX0_P"]
[get_ports "228_TX0_N"]
[get_ports "228_RX0_P"]
[get_ports "228_RX0_N"]
[get_ports "229_REFCLK1_P"]
[get_ports "229_REFCLK1_N"]
[get_ports "229_REFCLK0_P"]
[get_ports "229_REFCLK0_N"]
[get_ports "229_TX3_P"]
[get_ports "229_TX3_N"]
[get_ports "229_RX3_P"]
[get_ports "229_RX3_N"]
[get_ports "229_TX2_P"]
[get_ports "229_TX2_N"]
[get_ports "229_RX2_P"]
[get_ports "229_RX2_N"]
[get_ports "229_TX1_P"]
[get_ports "229_TX1_N"]
[get_ports "229_RX1_P"]
[get_ports "229_RX1_N"]
[get_ports "229_TX0_P"]
[get_ports "229_TX0_N"]
[get_ports "229_RX0_P"]
[get_ports "229_RX0_N"]
[get_ports "230_REFCLK1_P"]
[get_ports "230_REFCLK1_N"]
[get_ports "230_REFCLK0_P"]
[get_ports "230_REFCLK0_N"]
[get_ports "230_TX3_P"]
[get_ports "230_TX3_N"]
[get_ports "230_RX3_P"]
[get_ports "230_RX3_N"]
[get_ports "230_TX2_P"]
[get_ports "230_TX2_N"]
[get_ports "230_RX2_P"]
[get_ports "230_RX2_N"]
[get_ports "230_TX1_P"]
[get_ports "230_TX1_N"]
[get_ports "230_RX1_P"]
[get_ports "230_RX1_N"]
[get_ports "230_TX0_P"]
[get_ports "230_TX0_N"]
[get_ports "230_RX0_P"]
[get_ports "230_RX0_N"]
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