Xilinx VCU1287 User Manual page 27

300 MHz LVDS Oscillator
The VCU1287 board has one 300 MHz LVDS oscillator U42 (callout 12,
connected to multi-region clock capable (MRCC) inputs on the FPGA.
FPGA pin connections to the LVDS oscillator.
Table 3-8: LVDS Oscillator MRCC Connections
FPGA (U1)
Pin Function
AW14 SYSTEM CLOCK_P
AW13 SYSTEM CLOCK_N
Differential SMA MRCC Pin Inputs
The VCU1287 board provides two pairs of differential SMA transceiver clock inputs (callout
34, Figure 2-1) that can be used for connecting to an external clock source. The FPGA MRCC
pins are connected to the SMA connectors as shown in
Table 3-9: Differential SMA Clock Connections
Pin
L32 USER CLOCK_1_P
K32 USER CLOCK_1_N
M31 USER CLOCK_2_P
M32 USER CLOCK_2_N
VCU1287 Characterization Board
UG1121 (v1.0) December 11, 2015
Direction I/O Standard
Input LVDS
Input LVDS
FPGA(U1)
Function Direction
INPUT
INPUT
INPUT
INPUT
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Chapter 3: Board Component Descriptions
Schematic
Net Name
Pin
300 MHz LVDS
LVDS_OSC_P 4
300 MHz LVDS
LVDS_OSC_N 5
Table 3-9.
Schematic Net
Name
IOSTANDARD
LVDS CLK_DIFF_1_P
LVDS CLK_DIFF_1_N
LVDS CLK_DIFF_2_P
LVDS CLK_DIFF_2_N
Figure 2-1)
Table 3-8 lists the
Device (42)
Function Direction
Output
oscillator
Output
oscillator
SMA Connector
J84
J85
J83
J86
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