Xilinx VCU1287 User Manual page 30

Figure 3-10 shows the user I/O connector J95 (callout 29,
X-Ref Target - Figure 3-10
User Pushbuttons (Active-High)
SW8 and SW9 (callout 27,
to user I/O pins on the FPGA as shown in
purpose.
Table 3-13: User Pushbuttons
Pin
AN14 User push button
AM14 User push button
VCU1287 Characterization Board
UG1121 (v1.0) December 11, 2015
J95
2
4
6
8
10
12
14
16
18
GND
Figure 3-10: User I/O (J95)
Figure 2-1) are active-High user push buttons that are connected
FPGA(U1)
Function Direction
Input
Input
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Chapter 3: Board Component Descriptions
Figure
1 USER_SW1
3 USER_SW2
5 USER_SW3
7 USER_SW4
9 USER_SW5
11 USER_SW6
13 USER_SW7
15 USER_SW8
17
VCCO_HP_BUS
Table 3-13. These switches can be used for any
Schematic
Net Name
IOSTANDARD
LVCMOS18 USER_PB1
LVCMOS18 USER_PB2
2-1).
Reference
Designator
SW9
SW8
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