Xilinx VCU1287 User Manual page 22

FPGA Configuration
The FPGA is configured using one of the following options:
• Digilent embedded USB JTAG connector (callout 6,
The VCU1287 board comes with an embedded USB-to-JTAG configuration module
(Digilent, U80), which allows a host computer to access the board JTAG chain using a
Standard A to Micro-B USB cable.
• Platform cable USB JTAG cable connector (callout 7,
A JTAG connector (J2) can be used to provide access to the JTAG chain using the Xilinx
Platform Cable USB, Platform Cable USB II, or Parallel Cable IV (PCIV) configuration
cable.
• SD card using the Zynq-7000 AP SoC system controller in 8-bit SelectMAP mode
(callout 8, Figure
The FPGA can be configured from an SD memory card installed in J10 with the help of
the system controller U38, which reads a predefined bit file from the SD card and
configures the FPGA in 8-bit SelectMAP configuration mode. See
The JTAG chain of the board is illustrated in
is part of the chain (J6 jumper uninstalled). Installing the J6 jumper enables an 8-bit bus
transceiver (U69, SN74AVC8T245) and adds the FMC interfaces to the chain.
X-Ref Target - Figure 3-7
Xilinx
System
Controller
XC7Z010-
1.8V
CLG225
BANK 34 (1.8V)
USB-JTAG
Module
Micro-B 1.8V
USB Conn
JTAG
Conn
VCU1287 Characterization Board
UG1121 (v1.0) December 11, 2015
2-1).
VCCO_HR
DUT_TDI
3.3V
Figure 3-7: JTAG Chain
www.xilinx.com
Chapter 3: Board Component Descriptions
Figure 2-1).
Figure 2-1).
Figure 3-7. By default, only the UltraScale FPGA
TMS_0
TDO_0
VCCO_HR
2:1
TDI_0
MUX
FMC3_TDO
FMC1/AFX FMC2/AFX FMC3/AFX
Connector Connector Connector
(VCCO_HP) (VCCO_HR) (VCCO_HP)
FMC2_TDI FMC3_TDI
FPGA CONFIG Menu.
Xilinx
UltraScale
FPGA
BANK 0 (VCCO)
22
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