Xilinx VCU1287 User Manual page 40

Characterization board
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Information for each GTY transceiver clock input is shown in
Table 3-16: GTY Transceiver Reference Clock Inputs
U1 FPGA Pin
BA41
BA40
AY39
AY38
AV39
AV38
AU37
AU36
AR37
AR36
AN37
AN36
AL37
AL36
AJ37
AJ36
AG37
AG36
AE37
AE36
AC37
AC36
AA37
AA36
W37
W36
U37
U36
R37
R36
N37
N36
VCU1287 Characterization Board
UG1121 (v1.0) December 11, 2015
Net Name
124_REFCLK0_N
124_REFCLK0_P
124_REFCLK1_N
124_REFCLK1_P
125_REFCLK0_N
125_REFCLK0_P
125_REFCLK1_N
125_REFCLK1_P
126_REFCLK0_N
126_REFCLK0_P
126_REFCLK1_N
126_REFCLK1_P
127_REFCLK0_N
127_REFCLK0_P
127_REFCLK1_N
127_REFCLK1_P
128_REFCLK0_N
128_REFCLK0_P
128_REFCLK1_N
128_REFCLK1_P
129_REFCLK0_N
129_REFCLK0_P
129_REFCLK1_N
129_REFCLK1_P
130_REFCLK0_N
130_REFCLK0_P
130_REFCLK1_N
130_REFCLK1_P
131_REFCLK0_N
131_REFCLK0_P
131_REFCLK1_N
131_REFCLK1_P
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Chapter 3:
Board Component Descriptions
Table
3-16.
Quad
124
124
124
124
125
125
125
125
126
126
126
126
127
127
127
127
128
128
128
128
129
129
129
129
130
130
130
130
131
131
131
131
Send Feedback
Connector
J37
J37
J37
J37
J155
J155
J155
J155
J38
J38
J38
J38
J80
J80
J80
J80
J39
J39
J39
J39
J82
J82
J82
J82
J141
J141
J141
J141
J142
J142
J142
J142
40

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