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Intel® Server System M50CYP2UR Family System Integration and Service Guide
E.2
BIOS POST Progress Codes
The following table provides a list of all POST progress codes.
Post
Upper Nibble
Code
8h
4h
2h
(Hex)
SEC Phase
01
0
0
02
0
0
03
0
0
04
0
0
05
0
0
06
0
0
UPI RC (Fully leverage without platform change)
A1
1
0
A3
1
0
A6
1
0
A7
1
0
A8
1
0
A9
1
0
AA
1
0
AB
1
0
AE
1
0
AF
1
0
PEI Phase
10
0
0
11
0
0
15
0
0
19
0
0
Integrated I/O Progress Codes
E0
1
1
E1
1
1
E2
1
1
E3
1
1
E4
1
1
E5
1
1
E6
1
1
E7
1
1
E8
1
1
E9
1
1
EA
1
1
EB
1
1
EC
1
1
ED
1
1
EE
1
1
EF
1
1
134
Table 11. POST Progress Codes
Lower Nibble
1h
8h
4h
2h
0
0
0
0
0
0
0
0
0
1
0
0
0
0
1
0
0
0
1
0
0
0
0
1
0
0
0
0
1
1
1
0
0
0
0
1
0
0
0
1
1
0
0
1
1
1
0
0
1
1
1
0
1
0
0
1
0
1
0
0
1
0
1
0
1
1
0
1
0
1
1
0
1
1
1
1
0
1
1
1
0
1
0
0
0
0
1
0
0
0
0
1
0
1
0
0
1
1
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
1
1
0
0
0
1
1
0
0
1
0
1
0
0
1
0
1
0
0
1
1
1
0
0
1
1
1
0
1
0
0
1
0
1
0
0
1
0
1
0
1
1
0
1
0
1
1
0
1
1
0
1
0
1
1
0
1
0
1
1
1
1
0
1
1
1
1h
1
First POST code after CPU reset
0
Microcode load begin
1
CRAM initialization begin
0
PEI Cache When Disabled
1
SEC Core At Power On Begin.
0
Early CPU initialization during SEC Phase.
1
Collect info such as SBSP, boot mode, reset type, etc.
1
Setup minimum path between SBSP and other sockets
0
Sync up with PBSPs
1
Topology discovery and route calculation
0
Program final route
1
Program final IO SAD setting
0
Protocol layer and other uncore settings
1
Transition links to full speed operation
0
Coherency settings
1
KTI initialization done
0
PEI Core
1
CPU PEIM
1
Platform Type Init
1
Platform PEIM Init
0
Integrated I/O Early Init Entry
1
Integrated I/O Pre-link Training
0
Integrated I/O EQ Programming
1
Integrated I/O Link Training
0
Internal Use
1
Integrated I/O Early Init Exit
0
Integrated I/O Late Init Entry
1
Integrated I/O PCIe Ports Init
0
Integrated I/O IOAPIC init
1
Integrated I/O VTD Init
0
Integrated I/O IOAT Init
1
Integrated I/O DXF Init
0
Integrated I/O NTB Init
1
Integrated I/O Security Init
0
Integrated I/O Late Init Exit
1
Integrated I/O ready to boot
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