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Table 51: CTP Bundle Custom Clocking Settings in the CTP Menu
Field
DDS Synthesizer Source
DIV (clk divider) Source
DIV (clk divider) Value
ST (net bound i/f) clk sel
Copyright © 2018, Juniper Networks, Inc.
Function
Specifies the clock source for the DDS.
Specifies the source for the divider clock.
The DIV clock is an alternative clock
generator for the bundle, and its output
clock is an even integer divider of its
source clock.
The divider is used to configure
asymmetric circuits.
For example, if the source clock is 512
KHz, the output of the DIV clock can be
256 KHz, 128 KHz, 85.333 KHz, so on.
Specifies the divider clock value. The
clock value of the DIV source is divided
by this value to obtain the output clock
value of the DIV clock.
Specifies the clock used for Send Timing
on the network bound interface.
Chapter 2: Configuring CTP Bundles
Your Action
Select:
User (OI)—The clock is recovered from
the user equipment.
Adaptive—The DDS uses adaptive
clocking to recover the clock signal
from the remote CTP device.
Autobaud—This setting enables the
monitoring of OAM packets for the
terminal timing (TT) frequency at the
other end and processing to
accommodate frequency changes
that are detected.
Select:
DDS Output—Direct digital synthesizer
clock generator.
Oscillator—Oscillator system clock.
Enter an even number from 2 through
64,000.
Select one (the values that appear
depend on whether the bundle is
configured as the DCE or as the DTE):
OFF—No clock is used.
ST (ext clk)—Send timing clock. The
interface clock signal from the DCE to
the DTE (CTP device).
DDS (synth)—Direct digital synthesizer
clock
TT (ext clk)—Transmit timing clock.
The interface clock signal from the
DTE to the DCE (CTP device).
RT (ext clk)—Receive timing clock.
Interface clock signal from the DCE to
the DTE (CTP device).
DIV (synth)—Divider clock generator.
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