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SUBTEST #3 — If Instruction Test
This test checks the functionality of the if branching.
Instruction memory is loaded with a wait on event 'a' instruction in the non-if
branch of memory and a break instruction in the if branch.
The first pass of the test sets the branch pattern to a never branch condition.
The module is started and a wait is begun for the vectors to get to the wait
instruction. The hardware should stop on the wait instruction, not the break.
The main status is checked to verify this stop condition.
The second pass of the test sets the branch pattern to always branch. Again
the module is started and a wait is begun. In this case the break instruction
should be the stop condition.
DIAGNOSTIC INTEGER VALUE:
This test is only valid for signals on the master board of the configuration.
The values returned from any expansion cards will be zero. The integer
returned will have the following bit format:
BIT #:
15 ,14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4
unused
The Test Mode bit positions have the following meaning:
0 — passed
1 — failed to stop on wait in non-if branch
2 — took if branch on no branch event
4 — failed to stop on break in if branch
8 — took non-if branch on any branch event
Servicing the Agilent 16522A
Instruction Tests
3, 2, 1, 0
Test Mode
4–19
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