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Servicing the Agilent 16522A
Instruction Tests
SUBTEST #2 — Wait Instruction Test
This test checks the functionality of the wait command in the instruction
memory and the status register that reads the wait. The test is performed on
each of the four event registers. The current wait event being tested is loaded
on the first page of memory and a break instruction is loaded on the third
page of memory.
The first pass of the test places a wait on no event in the event register. The
hardware is started and a wait is begun for the vectors to hit the break
instruction on the third page. The main status is checked to see that the
hardware is stopped by the break instruction.
The second pass of the test places a wait on any condition in the event
register. Again the hardware is started wait is begun. On this pass the
hardware should be stopped by the wait condition and not by the break
condition.
The final pass clears the current wait condition using the hardware wait clear
command. The module should run from the current wait to the break
condition and once again stop.
DIAGNOSTIC INTEGER VALUE:
This test is only valid for signals on the master board of the configuration.
The values returned from any expansion cards will be zero. The integer
returned will have the following bit format:
BIT #:
15, 14,13, 12
Event D
Each nibble corresponds to the event register being tested. The value of the
nibble for the event register has the following definition:
0 — passed
1 — failed to stop on break with no event wait
2 — stopped on wait with setting of no event
3 — failed to stop on break or wait with wait any event
4 — failed to stop on wait with wait any event
5 — failed to clear wait
6 — stopped on false break condition
It should be noted that the value returned will be the last error encountered.
4–18
11, 10, 9, 8
7, 6, 5, 4
3, 2, 1, 0
Event C
Event B
Event A
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