C. Interface - Sharp AR-BC260 Service Manual

C. Interface

a. USB I/F (CN13)
This connector is USB Type-B 4-pin connector.
USB I/F (CN13) Pin Assignment
Pin No
1
2
3
4
OKI ML60852A is used as USB controller. The USB Controller
device is connected with the 32-bit I/O Bus of D8501A, and IOCS0
is used. Moreover, a DMA controller uses DMAC Ch.0 in D8501A.
Spec
USB Rev. 1.1
Transfer type Control, Bulk, Interrupt, Isochronous
End Point 5 or 6
USB transceiver Built-in
EP1 DMA Supported
DMA Channel 2
Bus-powered devices Supported
DMA Data Width 8 or 16
Intelligent SIE Supported
D8501A
(IC22)
EA[29:22]
SA[23:1]
244 Buffer
IOWRZ0
(IC23-25)
IORDZ
ED[15:0]
245 Buffer
SD[31:0]
(IC14-17)
EXTREZ0
EXTACKZ0
IOCS0
INTX6 USBINTZ
10K
+
GPIO3
-
5V
1M
10K
10K
b. IEEE1284 I/F (CN15)
Built-in 1284 controller in D8501A is used, and 1284 interfaces are
controlled.
D8501A internal 1284 Controller Specification
• Supports IEEE1284 Compatible mode, Nibble Mode, Forward/
Reverse ECP mode (without decompression)
• Internal 16 bytes transmit buffer and 16 bytes receive buffer
supports.
• 2 channel DMA support (32 bit packed)
• Transfer data amount has to be multiple of 4-bytes.
This connector is 36 pin Amphenol connector based on IEEE1284.
Signal
VCC
DATA -
DATA +
GND
OKI ML60852A
OKI
ML60852A
(IC45)
A[7:0]
USBINTZ
/INTR
/WR
/RD
USB I/F
(CN13)
D[15:0]
D+ D+
DMREQ
D- D-
DMACK_N
/CS Vbus
XIN XOUT
6MHz
(Y2)
AR-BC260 PRINTER CONTROLLER SECTION 14 - 8
Pin Assignment
No. Compatible Nibble, Byte
1 Nstrobe HostClk
2 D1 D1
3 D2 D2
4 D3 D3
5 D4 D4
6 D5 D5
7 D6 D6
8 D7 D7
9 D8 D8
10 Nack PrtClk
11 Busy PrtBusy
12 Rerror AckDatReq
13 Select Xflag
14 NautoFd HostBusy
15 N.C N.C
16 GND GND
17 FGND FGND
18 LogicHigh LogicHigh
31 Nlnit Nlnit
32 Nfault NdataAvil
36 Nselection IEEE1284active IEEE1284active
c. Engine I/F
Engine Interface is supported in PRTC (Alpha-5) board. There are
a power supply line, Video-related signals, Scanner-related sig-
nals, and signals of communication relation with engine in this
Engine Interface. Moreover, Video-related signals and communi-
cation-related signals are controlled by D8501A. Scanner-related
signals are controlled by SCNIF ASIC on the SCNIF board via PCI
I/F.
D8501A
(IC22)
ECLK[3:0]
VD3[3:0]
VD2[3:0]
VD1[3:0]
VD0[3:0]
244 Buffer
INTX10
(IC3-4,
INTX9
IC6-7)
INTX8
VSYNCZ / INTX4
HSYNC3
HSYNC2
HSYNC1
HSYNC0
CNTUP
GPIO15 DTC114YKA
LCX14
ICUUP
GPIO14
ENGWU
GPIO30 DTC114YKA
LCX14
PRTCWU
GPIO9
LCX14
RESPCUN
GPIO28
244 (IC7)
GPIO13
LCX14
CMD
TXD
LCX14
STS
RXD
/SRDY
RTSZ DTC114YKA
LCX14
/CRDY
CTSZ
Fan Power CN
LCX14
/POF
INTX3
SCNIF SCNIF
Board Slot
(N1521) (CN8)
Compatible,
ECP No. Byte Nibble,
ECP
HostClk 19 GND
D1 20 GND
D2 21 GND
D3 22 GND
D4 23 GND
D5 24 GND
D6 25 GND
D7 26 GND
D8 27 GND
PeriphClk 28 GND
PriphAck 29 GND
nAckReverse 30 GND
Xflag 33 N.C
HostAck 34 N.C
N.C 35 N.C
GND
FGND
LogicHigh
NrserveReqyest
NperiphRequest
Engine I/F
(CN1)
ECLK Video Clock
KD[3:0]
CD[3:0]
Video Data
(4bit/color)
MD[3:0]
YD[3:0]
/KVSYNC
/CVSYNC Vertical
Synchronization
/MVSYNC
/YVSYNC
/KHSYNC
/CHSYNC
Horizontal
Synchronization
/MHSYNC
/YHSYNC
/CNTUP
Communication
/ENGUP
Signals
/ENGWU (GPIO)
/CNTWU
RES_PCU
RES_PRT
/TXD_PRT
Communication
Signals
/RXD_PRT
(UART)
DTR_PRT
DSR_PRT
PWM Fan PWM
(CN12)
Engine Power
POF
Status Signals
SOR[76, 54, 32, 10]
Scanner
Data
SOG[76, 54, 32, 10]
244 (8bit/color)
SOB[76, 54, 32, 10]
Buffer
(IC9-10) SCLK Scanner Clock
SEL
Scanner Control
LD_GT
Signals