Table 4-6. Advanced Chipset Features; Table 4-7. Dram Clock/Drive Control; Advanced Chipset Features; Dram Clock/Drive Control - Quanmax KEEX-2010 User Manual

Industrial 3.5” embedded sbc

Hide thumbs

Table Of Contents

Table of Contents

Advanced Chipset Features

This section allows you to configure the system based on the specific features of the installed chipset. Please

note that these items should never need to be altered. The default settings have been chosen because they

provide the best operating conditions for your system. The only time you might consider making any changes

would be if you discovered that data was being lost while using your system.

DRAM Clock/Drive Control

AGP & P2P Bridge Control

Memory Hole

System BIOS Cacheable

Video RAM Cacheable

Top Performance

↑↓→←Move Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: General Help

F5: Previous Values

DRAM Clock/Drive Control

Press Enter to select DRAM Clock/Drive Control.

Current FSB Frequency

Current DRAM Frequency

DRAM Clock

DRAM Timing

x SDRAM CAS Latency [DDR/DDR

x Bank Interleave

x Precharge to Active(Trp)

x Active to Precharge(Tras)

x Active to CMD(Trcd)

x REF to ACT/REF (Trfc)

x ACT(0) to ACT(1) (TRRD)

↑↓→←Move Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: General Help

F5: Previous Values

KEEX-2010 Series User Guide

Phoenix - AwardBIOS CMOS Setup Utility

Advanced Chipset Features

[Press Enter]

[Disabled]

[Enabled]

[Disabled]

F6: Fail-safe defaults

F7: Optimized Defaults