I/O Address Map - Kontron CP308 User Manual

3u compactpci processor board based on the intel core 2 duo processor with the mobile intel gs45 express chipset
Table of Contents

Advertisement

CP308
4.2.2

I/O Address Map

The following table indicates the CP308-specific registers. The blue-shaded table cells indicate
SMC-specific registers.
Table 4-3:

I/O Address Map

ADDRESS
0x080
0x081
0x082 - 0x083
0x084
0x085
0x280
0x281
0x282
0x283
0x284
0x285
0x286
0x287
0x288
0x289
0x28A
0x28B
0x28C
0x28D - 0x28F
0x290
0x291
0x292
0x293
0x294 - 0x299
0x29A - 0x29C
0x29D
0x29E
0x29F
0xCA2; 0xCA3
ID 1027-4487, Rev. 3.0
uEFI BIOS POST Code Low Byte Register (POSTL)
uEFI BIOS POST Code High Byte Register (POSTH)
Reserved
Debug Low Byte Register (DBGL)
Debug High Byte Register (DBGH)
Status Register 0 (STAT0)
Status Register 1 (STAT1)
Control Register 0 (CTRL0)
Control Register 1 (CTRL1)
Device Protection Register (DPROT)
Reset Status Register (RSTAT)
Board Interrupt Configuration Register (BICFG)
Status Register 2 (STAT2)
Board ID Register (BID)
Board and PLD Revision Register (BREV)
Geographic Addressing Register (GEOAD)
Reserved
Watchdog Timer Control Register (WTIM)
Reserved
LED Configuration Register (LCFG)
LED Control Register (LCTRL)
General Purpose Output Register (GPOUT)
General Purpose Input Register (GPIN)
Reserved
Reserved
SMC Controller Status Register 0 (ICSTA0)
SMC Controller Status Register 1 (ICSTA1)
Reserved
SMC KCS Interface
DEVICE
Configuration
Page 4 - 5

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents