Differential Clock Waveform; Differential Clock Crosspoint Specification - Intel Quad-Core Xeon Datasheet

Figure 2-15. Differential Clock Waveform
Threshold
Region
Figure 2-16. Differential Clock Crosspoint Specification
650
600
550
500
450
400
350
300
250
200
46
BCLK1
Crossing
Voltage
BCLK0
Tp = T1: BCLK[1:0] period
550 + 0.5 (VHavg - 700)
250 mV
660 670 680 690 700 710 720 730 740 750 760 770 780 790 800 810 820 830 840 850
Crossing Ringback
Voltage Margin
Tp
550 mV
250 + 0.5 (VHavg - 700)
VHavg (mV)
§
Quad-Core Intel® Xeon® Processor 5300 Series Datasheet
Electrical Specifications
Overshoot
VH
Rising Edge
Ringback
Falling Edge
Ringback,
VL
Undershoot