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Electrical Specifications
Table 2-12. Voltage and Current Specifications (Sheet 3 of 3)
Symbol
I
CC_TDC
I
CC_VTT_OUT
I
CC_GTLREF
I
CC_VCCPLL
I
TCC
I
TCC
I
TCC
I
TCC
I
TCC
Notes:
1.
Unless otherwise noted, all specifications in this table are based on final silicon characterization data.
2.
These voltages are targets only. A variable voltage source should exist on systems in the event that a
different voltage is required. See
3.
The voltage specification requirements are measured across the VCC_DIE_SENSE and VSS_DIE_SENSE
lands and across the VCC_DIE_SENSE2 and VSS_DIE_SENSE2 lands with an oscilloscope set to 100 MHz
bandwidth, 1.5 pF maximum probe capacitance, and 1 MΩ minimum impedance. The maximum length of
ground wire on the probe should be less than 5 mm. Ensure external noise from the system is not coupled
in the scope probe.
4.
The processor must not be subjected to any static V
particular current. Failure to adhere to this specification can shorten processor lifetime.
5.
I
CC_MAX
capable of drawing I
details on the average processor current draw over various time durations.
6.
FMB is the flexible motherboard guideline. These guidelines are for estimation purposes only. See
Section 2.13.1
7.
This specification represents the total current for GTLREF_DATA_MID, GTLREF_DATA_END,
GTLREF_ADD_MID, and GTLREF_ADD_END.
8.
V
must be provided via a separate voltage source and must not be connected to V
TT
measured at the land.
9.
Minimum V
in
Figure
10. This specification refers to the total reduction of the load line due to VID transitions below the specified
VID.
11. Individual processor VID values may be calibrated during manufacturing such that two devices at the same
frequency may have different VID settings.
12. This specification applies to the VCCPLL land.
13. Baseboard bandwidth is limited to 20 MHz.
14. I
CC_TDC
should be used for the voltage regulator temperature assessment. The voltage regulator is responsible for
monitoring its temperature and asserting the necessary signal to inform the processor of a thermal
excursion. Please see the applicable design guidelines for further details. The processor is capable of
drawing I
average processor current draw over various time durations. This parameter is based on design
characterization and is not tested.
15. This is the maximum total current drawn from the V
specification does not include the current coming from on-board termination (R
Quad-Core Intel® Xeon® Processor 5300 Series Datasheet
Parameter
Thermal Design Current (TDC)
Quad-Core Intel® Xeon® Processor
L5318
Launch - FMB
DC current that may be drawn from
V
per land
TT_OUT
I
for
CC
GTLREF_DATA_MID,
GTLREF_DATA_END,
GTLREF_ADD_MID,
GTLREF_ADD_END
I
for PLL supply
CC
ICC for Quad-Core Intel® Xeon®
Processor E5300 during active
thermal control circuit (TCC)
I
for Quad-Core Intel® Xeon®
CC
Processor X5300 Series during
active thermal control circuit (TCC)
I
for Quad-Core Intel® Xeon®
CC
Processor X5365 Series during
active thermal control circuit (TCC)
I
for Quad-Core Intel® Xeon®
CC
Processor L5300 Series during
active thermal control circuit (TCC)
I
for Quad-Core Intel® Xeon®
CC
Processor L5318 during active
thermal control circuit (TCC)
Section 2.5
specification is based on maximum V
for up to 10 ms. Refer to
CC_MAX
for further details on FMB guidelines.
and maximum I
are specified at the maximum processor case temperature (T
CC
CC
6-1.
is the sustained (DC equivalent) current that the processor is capable of drawing indefinitely and
indefinitely. Refer to
Figure
CC_TDC
Min
Typ
for more information.
level that exceeds the V
CC
loadline Refer to
Figure 2-12
CC
Figure
2-5,
Figure
2-2, and
2-2,
Figure
2-3, and
Figure
2-5,for further details on the
plane by only one processor with R
TT
1,11
Max
Unit
Notes
45
A
6,14
580
mA
16
200
µA
7
260
mA
12
90
A
125
A
150
A
60
A
50
A
associated with any
CC_MAX
for details. The processor is
Figure 2-3
for further
. This specification is
CC
) shown
CASE
enabled. This
TT
), through the signal line.
TT
31
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