Thermtrip# Signal; Platform Environment Control Interface (Peci); Introduction; Peci Topology - Intel Quad-Core Xeon Datasheet

6.3.7

THERMTRIP# Signal

Regardless of whether or not TM1 or TM2 is enabled, in the event of a catastrophic
cooling failure, the processor will automatically shut down when the silicon has reached
an elevated temperature (refer to the THERMTRIP# definition in
point, the FSB signal THERMTRIP# will go active and stay active as described in
Table 5-1. THERMTRIP# activation is independent of processor activity and does not
generate any bus cycles. Intel also recommends the removal of V
6.4

Platform Environment Control Interface (PECI)

6.4.1

Introduction

PECI offers an interface for thermal monitoring of Intel processor and chipset
components. It uses a single wire, thus alleviating routing congestion issues.
Figure 6-8
Xeon® Processor 5300 Series. PECI uses CRC checking on the host side to ensure
reliable transfers between the host and client devices. Also, data transfer speeds across
the PECI interface are negotiable within a wide range (2 Kbps to 2 Mbps). The PECI
interface on Quad-Core Intel® Xeon® Processor 5300 Series is disabled by default and
must be enabled through BIOS. More information on this can be found in the Conroe
and Woodcrest Processor Family BIOS Writer's Guide.
Figure 6-8.

PECI Topology

6.4.1.1 T
CONTROL
Fan speed control solutions based on PECI utilize a T
processor IA32_TEMPERATURE_TARGET MSR. This MSR uses the same offset
temperature format as PECI, though it contains no sign bit. Thermal management
devices should infer the T
should utilize the relative temperature value delivered over PECI in conjunction with the
MSR value to control or optimize fan speeds.
diagram using PECI temperatures.
102
shows an example of the PECI topology in a system with Quad-Core Intel®
P E C I H o s t
C o n tro lle r
and TCC Activation on PECI-Based Systems
CONTROL
Q u a d -C o re In te l® X e o n ®
P ro c e s s o r 5 3 0 0 S e rie s
G 5
Q u a d -C o re In te l® X e o n ®
P ro c e s s o r 5 3 0 0 S e rie s
G 5
CONTROL
value as negative. Thermal management algorithms
Figure 6-9 shows a conceptual fan control
Quad-Core Intel® Xeon® Processor 5300 Series Datasheet
Thermal Specifications
Table 5-1). At this
.
TT
(S o c k e t 0 )
0
x
D o m a in 0
3
0
0
x
D o m a in 1
3
0
(S o c k e t 1 )
0
x
D o m a in 0
3
1
0
x
D o m a in 1
3
1
value stored in the