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Quad-Core Intel® Xeon® Processor 5300 Series Datasheet September 2007 Order Number: 315569-003...
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The Quad-Core Intel® Xeon® Processor 5300 Series may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request.
Processor Materials.................... 52 Processor Markings.................... 53 Processor Land Coordinates ................53 Land Listing ....................... 57 Quad-Core Intel® Xeon® Processor 5300 Series Pin Assignments ......57 4.1.1 Land Listing by Land Name ..............57 4.1.2 Land Listing by Land Number ..............69 Signal Definitions .......................
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Quad-Core Intel® Xeon® Processor X5300 Series and Load Current versus Time................... 32 Quad-Core Intel® Xeon® Processor X5365 Series Load Current versus Time .... 33 Quad-Core Intel® Xeon® Processor L5300 Series Load Current versus Time ..... 33 Quad-Core Intel® Xeon® Processor L5318 Load Current versus Time ...... 34 Quad-Core Intel®...
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2-10 Quad-Core Intel® Xeon® Processor X5365 Series VCC Static and Transient Tolerance Load Lines ................39 2-11 Quad-Core Intel® Xeon® Processor L5318 VCC Static and Transient Tolerance Load Lines ................41 2-12 VCC Overshoot Example Waveform..............43 2-13 Electrical Test Circuit ..................45 2-14 TCK Clock Waveform ..................
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Quad-Core Intel® Xeon® Processor E5300 Series Thermal Profile Table ....90 Quad-Core Intel® Xeon® Processor X5300 Series Thermal Specifications ....91 Quad-Core Intel® Xeon® Processor X5300 Series Thermal Profile A Table ....92 Quad-Core Intel® Xeon® Processor X5300 Series Thermal Profile B Table ....92 Quad-Core Intel®...
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Revision History Revision Description Date Initial Release November 2006 Added Quad-Core Intel® Xeon® Processor L5300 Series March 2007 Included the G-step information. Added the Quad-Core Intel® Xeon® September 2007 Processor L5318. § Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
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Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
Intel’s 65 nanometer process technology combining high performance with the power efficiencies of low-power Intel Core™ microarchitecture cores. The Quad- Core Intel® Xeon® Processor 5300 Series consists of two die, each containing two processor cores. All processors maintain the tradition of compatibility with IA-32 software.
2.13.1). Refer to the appropriate platform design guidelines for implementation details. The Quad-Core Intel® Xeon® Processor 5300 Series support 1333, or 1066 MHz Front Side Bus operation. The FSB utilizes a split-transaction, deferred reply protocol and Source-Synchronous Transfer (SST) of address and data to improve performance. The processor transfers data four times per bus clock (4X data transfer rate, as in AGP 4X).
• Quad-Core Intel® Xeon® Processor 5300 Series – Intel 64-bit microprocessor intended for dual processor servers and workstations. The Quad-Core Intel® Xeon® Processor 5300 Series is based on Intel’s 65 nanometer process, in the FC-LGA6 package with four processor cores. For this document, “processor” is used as the generic term for the “Quad-Core Intel®...
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Introduction • LGA771 socket – The Quad-Core Intel® Xeon® Processor 5300 Series interfaces to the baseboard through this surface mount, 771 Land socket. See the LGA771 Socket Design Guidelines for details regarding this socket. • Processor core – Processor core with integrated L1 cache. L2 cache and system bus interface are shared between the two cores on the die.
– The processor core power supply. • V – The processor ground. • V – FSB termination voltage. (Note: In some Intel processor EMTS documents, is instead called V State of Data The data contained within this document is the most accurate information available by the publication date of this document.
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Quad-Core Intel® Xeon® Processor 5300 Series Thermal/Mechanical Design Guidelines Clovertown Processor Boundary Scan Descriptive Language (BSDL) Model Debug Port Design Guide for UP/DP Systems Notes: Contact your Intel representative for the latest revision of these documents. § Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
V . The on-die termination resistors are always enabled on the processor to control reflections on the transmission line. Intel chipsets also provide on-die termination, thus eliminating the need to terminate the bus on the baseboard for most AGTL+ signals.
ESR bulk capacitors and high frequency ceramic capacitors. For further information regarding power delivery, decoupling and layout guidelines, refer to the appropriate platform design guidelines. Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
CLOCK_FLEX_MAX Model Specific Register (MSR). For details of operation at core frequencies lower than the maximum rated processor speed, refer to the Intel® 64 and IA-32 Architectures Software Developer’s Manual. Clock multiplying within the processor is provided by the internal phase locked loop (PLL), which requires a constant frequency BCLK[1:0] input, with exceptions for spread spectrum clocking.
Individual processors operate only at or below the frequency marked on the package. Listed frequencies are not necessarily committed production frequencies. For valid processor core frequencies, refer to the Quad-Core Intel® Xeon® Processor 5300 Series Specification Update. The lowest bus ratio supported is 1/6.
Table 2-3 is not related in any way to previous Intel® Xeon® processors or voltage regulator designs. If the processor socket is empty (VID[6:1] = 111111), or the voltage regulation circuit cannot supply the voltage that is requested, the voltage regulator must disable itself.
When the “111111” VID pattern is observed, the voltage regulator output should be disabled. Shading denotes the expected VID range of the Quad-Core Intel® Xeon® Processor 5300 Series. The VID range includes VID transitions that may be initiated by thermal events, assertion of the FORCEPR# signal (see Section 6.3.3), Extended HALT state transitions (see...
MS_ID0 Description Dual-Core Intel® Xeon® Processor 5000 Series Dual-Core Intel® Xeon® Processor 5100 Series All Quad-Core Intel® Xeon® Processor 5300 Series Reserved Note: The MS_ID[1:0] signals are provided to indicate the Market Segment for the processor and may be used for future processor compatibility or for keying.
These signals may be driven simultaneously by multiple agents (Wired-OR). Not all Quad-Core Intel® Xeon® Processor 5300 Series support the additional signals A[37:36]#. Processors that support these signals will be outlined in the Quad-Core Intel® Xeon® Processor 5300 Series NDA Specification Update.
Electrical Specifications Note: Not all Quad-Core Intel® Xeon® Processor 5300 Series support the additional signals A[37:36]#. Processors that support these signals will be outlined in the Quad-Core Intel® Xeon® Processor 5300 Series NDA Specification Update. CMOS Asynchronous and Open Drain...
FSB frequency, core frequency, number of cores, and have the same internal cache sizes. Mixing components operating at different internal clock frequencies is not supported and will not be validated by Intel. Combining processors from different power segments is also not supported.
Not all operating systems can support dual processors with mixed frequencies. Mixing processors of different steppings but the same model (as per CPUID instruction) is supported. Details regarding the CPUID instruction are provided in the AP-485 Intel® Processor Identification and the CPUID Instruction application note.
Flexible Motherboard Guidelines (FMB) The Flexible Motherboard (FMB) guidelines are estimates of the maximum values the Quad-Core Intel® Xeon® Processor 5300 Series will have over certain time periods. The values are only estimates and actual specifications for future processors may differ.
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Launch - FMB Thermal Design Current (TDC) CC_TDC Quad-Core Intel® Xeon® Processor 6,14 X5365 Series Launch - FMB Thermal Design Current (TDC) CC_TDC Quad-Core Intel® Xeon® Processor 6,14 L5300 Series Launch - FMB Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
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15. This is the maximum total current drawn from the V plane by only one processor with R enabled. This specification does not include the current coming from on-board termination (R ), through the signal line. Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
PWRGOOD to CC_RESET RESET# de-assertion time specification and Table 2-23 for the RESET# Pulse Width specification Figure 2-2. Quad-Core Intel® Xeon® Processor E5300 Series Load Current versus Time 10 0 0 .0 1 0 . 1 10 0 10 0 0...
Electrical Specifications Not 100% tested. Specified by design characterization. Figure 2-6. Quad-Core Intel® Xeon® Processor L5318 Load Current versus Time Notes: Processor or voltage regulator thermal protection circuitry should not trip for load currents greater than CC_TDC Not 100% tested. Specified by design characterization.
VR implementation. Please refer to the appropriate platform design guide for details on VR implementation. Icc values greater than 90 A and 60 A are not applicable for the Quad-Core Intel® Xeon® Processor E5300 and Quad-Core Intel® Xeon® Processor L5300 Series, respectively.
Enterprise Voltage Regulator Down (EVRD) 11.0 Design Guidelines for socket load line guidelines and VR implementation. Please refer to the appropriate platform design guide for details on VR implementation. Figure 2-8. Quad-Core Intel® Xeon® Processor X5300 Series VCC Static and Transient Tolerance Load Lines Ic c [A ] 1 0 0 1 0 5 1 1 0 1 1 5 1 2 0 1 2 5 V ID - 0 .0 0 0...
Enterprise Voltage Regulator Down (EVRD) 11.0 Design Guidelines for socket load line guidelines and VR implementation. Please refer to the appropriate platform design guide for details on VR implementation Table 2-14. V Static and Transient Tolerance for Quad-Core Intel® Xeon® Processor X5365 Series (Sheet 1 of 2) Notes...
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Electrical Specifications Table 2-14. V Static and Transient Tolerance for Quad-Core Intel® Xeon® Processor X5365 Series (Sheet 2 of 2) Notes CC_Max CC_Typ CC_Min VID - 0.063 VID - 0.073 VID - 0.083 1,2,3 VID - 0.069 VID - 0.079 VID - 0.089...
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Electrical Specifications Table 2-15. V Static and Transient Tolerance for Quad-Core Intel® Xeon® Processor L5318 Series Notes CC_Max CC_Typ CC_Min VID - 0.000 VID - 0.015 VID - 0.030 1,2,3 VID - 0.005 VID - 0.020 VID - 0.035 1,2,3 VID - 0.010...
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Electrical Specifications Figure 2-11. Quad-Core Intel® Xeon® Processor L5318 V Static and Transient Tolerance Load Lines Notes: The V and V loadlines represent static and transient limits. Please see Section 2.13.2 for VCC CC_MIN CC_MAX overshoot specifications. Refer to Table 2-12 for processor VID information.
VCC_DIE_SENSE and VSS_DIE_SENSE lands and across the VCC_DIE_SENSE2 and VSS_DIE_SENSE2 lands. Table 2-19. V Overshoot Specifications Symbol Parameter Units Figure Notes Magnitude of V overshoot above VID 2-12 OS_MAX Time duration of V overshoot above VID µs 2-12 OS_MAX Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
GTLREF_ADD_END specifications. The AGTL+ reference voltages (GTLREF_DATA_MID, GTLREF_DATA_END, GTLREF_ADD_MID, and GTLREF_ADD_END) must be generated on the baseboard using high precision voltage divider circuits. Refer to the appropriate platform design guidelines for implementation details. Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
V measured by the oscilloscope. Havg Overshoot is defined as the absolute value of the maximum voltage. Undershoot is defined as the absolute value of the minimum voltage. Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
Figure 2-14. TCK Clock Waveform = T55: Period V1, V2: For rise and fall times, TCK is measured between 20% and 80% points on the waveform. V3: TCK is referenced to 0.5 * V Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
Mechanical Specifications Mechanical Specifications The Quad-Core Intel® Xeon® Processor 5300 Series are packaged in a Flip Chip Land Grid Array (FC-LGA6) package that interfaces to the baseboard via a LGA771 socket. The package consists of two processor dies mounted on a pinless substrate with 771 lands.
Processor Package Drawing (Sheet 1 of 3) Note: Guidelines on potential IHS flatness variation with socket load plate actuation and installation of the cooling solution is available in the processor Thermal/Mechanical Design Guidelines. Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
It is a relatively slow bending event compared to shock and vibration tests. For more information on the transient bend limits, please refer to the MAS document entitled Manufacturing with Intel® Components using 771-land LGA Package that Interfaces with the Motherboard via a LGA771 Socket.
LGA771 socket, which meets the criteria outlined in the LGA771 Socket Design Guidelines. Processor Mass Specifications The typical mass of the Quad-Core Intel® Xeon® Processor 5300 Series is 21.5 g (0.76 oz). This includes all components which make up the entire processor product. Processor Materials The Quad-Core Intel®...
Mechanical Specifications Processor Markings Figure 3-5 shows the topside markings on the processor. This diagram aids in the identification of the Quad-Core Intel® Xeon® Processor 5300 Series. Figure 3-5. Processor Top-side Markings (Example) Legend: Mark Text (Production Mark): 2.66GHZ/8M/1333 GROUP1LINE1 GROUP1LINE1 Intel ®...
Mechanical Specifications Figure 3-6. Processor Land Coordinates, Top View Address / Socket 771 Common Clock / Quadrants Async Top View Data / Clocks Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
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Land Listing Table 4-1. Land Listing by Land Name (Sheet 23 of 23) Signal Pin Name Direction Buffer Type VTT_OUT Power/Other Output VTT_SEL Power/Other Output Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
All bus agents observe the ADS# activation to begin parity checking, protocol checking, address decode, internal snoop, or deferred reply ID match operations associated with the new transaction. This signal must be connected to the appropriate pins on all Quad-Core Intel® Xeon® Processor 5300 Series FSB agents. ADSTB[1:0]#...
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COMP[3:0] COMP[3:0] must be terminated to VSS on the baseboard using precision resistors. These inputs configure the AGTL+ drivers of the processor. Refer to the appropriate platform design guidelines for implementation details. Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
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DBR# is used by a debug port interposer so that an in-target probe can drive reset. If a debug port connector is implemented in the system, DBR# is a no- connect on the Quad-Core Intel® Xeon® Processor 5300 Series package. DBR# is not a processor signal.
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When STPCLK# is not asserted, FERR#/PBE# is similar to the ERROR# signal on the Intel 387 coprocessor, and is included for compatibility with systems using MS-DOS*-type floating-point error reporting. When STPCLK# is asserted, an assertion of FERR#/PBE# indicates that the processor has a pending break event waiting for service.
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The LL_ID[1:0] signals are used to select the correct loadline slope for the processor. These signals are not connected to the processor die. A logic 0 is pulled to ground and a logic 1 is a no-connect on the Quad-Core Intel® Xeon® Processor 5300 Series package.
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TDO (Test Data Out) transfers serial test data out of the processor. TDO provides the serial output needed for JTAG specification support. TESTHI[11:0], The TESTHI signals must use individual pull-up resistors. A matched resistor must be used for each Signal. Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
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Notes: For this processor land on the Quad-Core Intel® Xeon® Processor 5300 Series, the maximum number of symmetric agents is one. Maximum number of priority agents is zero. For this processor land on the Quad-Core Intel® Xeon® Processor 5300 Series, the maximum number of symmetric agents is two.
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Signal Definitions Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
Thermal Specifications Package Thermal Specifications The Quad-Core Intel® Xeon® Processor 5300 Series requires a thermal solution to maintain temperatures within its operating limits. Any attempt to operate the processor outside these operating limits may result in permanent damage to the processor and potentially other components within the system.
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It should be noted that the upper point associated with the CASE Quad-Core Intel® Xeon® Processor X5300 Series Thermal Profile B (x = TDP and y = @ TDP) represents a thermal solution design point. In actuality the CASE_MAX_B...
45°C, and the Short-Term Thermal Profile is defined at an ambient operating temperature of 60°C. Both of these thermal profiles ensure adherence to Intel reliability requirements. It is expected that the Thermal Control Circuit (TCC) would only be activated for very brief periods of time when running the most power intensive applications.
Please refer to Table 6-2 for discrete points that constitute the thermal profile. Refer to the Quad-Core Intel® Xeon® Processor 5300 Series Thermal/Mechanical Design Guidelines for system and environmental implementation details. Table 6-2. Quad-Core Intel® Xeon® Processor E5300 Series Thermal Profile Table Power (W) (°...
Implementation of Quad-Core Intel® Xeon® Processor X5300 Series Thermal Profile A should result in virtually no TCC activation. Furthermore, utilization of thermal solutions that do not meet processor Quad- Core Intel® Xeon® Processor X5300 Series Thermal Profile A will result in increased probability of TCC activation and may incur measurable performance loss. (See Section 6.3...
Pow e r [W] Notes: Please refer to Table 6-7 for discrete points that constitute the thermal profile. Refer to the Quad-Core Intel® Xeon® Processor 5300 Series Thermal/Mechanical Design Guidelines for system and environmental implementation details. Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
Please refer to Table 6-9 for discrete points that constitute the thermal profile. Refer to the Quad-Core Intel® Xeon® Processor 5300 Series Thermal/Mechanical Design Guidelines for system and environmental implementation details. Table 6-9. Quad-Core Intel® Xeon® Processor L5300 Series Thermal Profile Power (W) (°...
Table 6-12 for discrete points that constitute the thermal profile. Refer to the Quad-Core Intel® Xeon® Processor L5318 Thermal/Mechanical Design Guidelines for system and environmental implementation details. The Nominal Thermal Profile must be used for all normal operating conditions, or for products that do not require NEBS Level 3 compliance.
6.3.1 Thermal Monitor Features Quad-Core Intel® Xeon® Processor 5300 Series provide two thermal monitor features, Thermal Monitor (TM1) and Enhanced Thermal Monitor (TM2). The TM1 and TM2 must both be enabled in BIOS for the processor to be operating within specifications. When both are enabled, TM2 will be activated first and TM1 will be added if TM2 is not effective.
Thermal Profile, the Quad-Core Intel® Xeon® Processor L5300 Series Thermal Profile, Quad-Core Intel® Xeon® Processor X5365 Series Thermal Profile, or Quad-Core Intel® Xeon® Processor X5300 Series Thermal Profile A it is anticipated that the TCC would only be activated for very short periods of time when running the most power intensive applications.
Demand” mode and is distinct from the Thermal Monitor 1 and Thermal Monitor 2 features. On-Demand mode is intended as a means to reduce system level power consumption. Systems utilizing the Quad-Core Intel® Xeon® Processor 5300 Series must not rely on software usage of this mechanism to limit the processor temperature.
TCC will be active when PROCHOT# is asserted. The processor can be configured to generate an interrupt upon the assertion or de-assertion of PROCHOT#. Refer to the Intel® 64 and IA-32 Architectures Software Developer’s Manual and the Conroe and Woodcrest Processor Family BIOS Writer’s Guide for specific register and programming details.
It uses a single wire, thus alleviating routing congestion issues. Figure 6-8 shows an example of the PECI topology in a system with Quad-Core Intel® Xeon® Processor 5300 Series. PECI uses CRC checking on the host side to ensure reliable transfers between the host and client devices.
The PECI device address for socket 0 is 0x30 and socket 1 is 0x31. Please note that each address also supports two domains (Domain 0 and Domain 1). For more information on PECI domains, please refer to the Platform Environment Control Interface Specification. Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
Table 6-13 below: Table 6-13. GetTemp0() and GetTemp1() Error Codes Error Code Description 0x8000 General sensor error Sensor is operational, but has detected a temperature below its operational range 0x8002 (underflow). § Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
Address lands not identified in this table as configuration options should not be asserted during RESET#. Requires de-assertion of PWRGOOD. Disabling of any of the cores within the Quad-Core Intel® Xeon® Processor 5300 Series must be handled by configuring the EXT_CONFIG Model Specific Register (MSR).
RESET# will cause the processor to immediately initialize itself. The return from a System Management Interrupt (SMI) handler can be to either Normal Mode or the HALT state. See the Intel® 64 and IA-32 Intel® Architecture Software Developer's Manual, Volume III: System Programming Guide for more information.
HALT and MWAIT instruction since the processor is already in the lowest core frequency and voltage operating point. Values represent SKUs with Extended HALT state (25W/30W) and without Extended HALT state (34W). G-0 stepping SKUs with Extended HALT state are specified at T = 40°C. CASE Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
When the STPCLK# pin is asserted, the Stop-Grant state of the processor is entered 20 bus clocks after the response phase of the processor issued Stop Grant Acknowledge special bus cycle. The Quad-Core Intel® Xeon® Processor 5300 Series will issue two Stop Grant Acknowledge special bus cycles, once for each die. Once the STPCLK# pin has been asserted, it may only be deasserted once the processor is in the Stop Grant state.
Quad-Core Intel® Xeon® Processor 5300 Series support Enhanced Intel SpeedStep® Technology. This technology enables the processor to switch between multiple frequency and voltage points, which results in platform power savings. Enhanced Intel SpeedStep Technology requires support for dynamic VID transitions in the platform.
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Features support this feature will be provided in future releases of the Quad-Core Intel® Xeon® Processor 5300 Series NDA Specification Update when available. Enhanced Intel SpeedStep Technology creates processor performance states (P-states) or voltage/frequency operating points. P-states are lower power capability states within...
Boxed Processor Specifications Boxed Processor Specifications Introduction Intel boxed processors are intended for system integrators who build systems from components available through distribution channels. The Quad-Core Intel® Xeon® Processor 5300 Series will be offered as an Intel boxed processor. Intel will offer the Quad-Core Intel® Xeon® Processor 5300 Series boxed processor with two heat sink configurations available for each processor frequency: 1U passive/ 3U+ active combination solution and a 2U passive only solution.
Figure 8-4 through Figure 8-8. Figure 8-9 through Figure 8-10 are the mechanical drawings for the 4-pin board fan header and 4-pin connector used for the active CEK fan heat sink solution. Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
3-wire designs. When operating in thermistor controlled mode, fan RPM is automatically varied based on the TINLET temperature measured by a thermistor located at the fan inlet of the heat sink solution. Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
5°C with an external ambient temperature RISE ° of 35 C. Following these guidelines will allow the designer to meet Quad-Core Intel® Xeon® Processor X5300 Series Thermal Profile and conform to the thermal requirements of the processor. 8.3.2.2...
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They are as follows: • CEK Spring (supplied by baseboard vendors) • Heat sink standoffs (supplied by chassis vendors) § Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...
LAI is critical in providing the ability to probe and capture FSB signals. There are two sets of considerations to keep in mind when designing a Quad-Core Intel® Xeon® Processor 5300 Series based system that can make use of an LAI: mechanical and electrical.
Contact the logic analyzer vendor for electrical specifications and load models for the LAI solution they provide. § Quad-Core Intel® Xeon® Processor 5300 Series Datasheet...