Figure 2.7 External Views Of The Sb - Fujitsu PRIMEQUEST 1000 Series General Description Manual

PRIMEQUEST 1000 Series General Description
CHAPTER 2 Hardware Configuration
No.
(4) Right side view
(5) Front perspective view
(6) Rear perspective view

FIGURE 2.7 External views of the SB

The following provides an outline of each component making up the SB.
MB (memory buffer)
The MB is a converter chip connected to the CPU.
The MB converts a one-channel SMI interface into a two-channel DDR3. Up to two DDR3 DIMMs can be connected
to each DDR3 channel.
One SB supports up to 32 DIMMs. One CPU socket supports up to 16 DIMMs.
IOH (I/O hub)
The IOH is a bridge LSI chip that converts QPI to PCI Express.
In addition to PCI Express, an ESI bus interface for ICH connection is also mounted.
The ESI (Enterprise Southbridge Interface) bus is the output bus from the IOH, and an ICH can be connected to it.
The ICH bundles legacy interfaces.
ICH10 (I/O controller hub 10)
The ICH is a chip set component that plays a role in bundling legacy interfaces.
The ICH10 is connected to the IOH through ESI. The ICH10 has a USB controller, APIC, RTC, LPC bus, PCI
Express bus controller, and SPI bus controller.
The ICH10 has four external output USB ports on the front of the SB and one internal port. The external USB ports
are intended for use by a USB keyboard, USB mouse, and USB-DVD (CD-ROM) drive.
BMC (baseboard management controller)
The BMC is a system management controller that continuously monitors the system for serious hardware errors
and notifies the operating system of such errors.
The BMC is connected to the LPC bus. One of two internal NICs (MAC) communicates with the MMB mainly for
(PECI bus) communication with the CPU (BIOS) and control of ICH GPIO. The other NIC communicates for video
redirection. (The MMB is used for relaying only.) The BMC has an integrated VGA function, and a VGA connector
is provided on the front of the SB.
To increase availability, the BMC firmware storage memory has a duplicated (active/standby) configuration. When
an error is detected in the active memory during firmware startup, control is switched to the standby memory to
restart the firmware.
LFWH (local firmware hub) / GFWH (global firmware hub)
The LFWH and GFWH are flash memory for storing BIOS code.
To increase availability, each LFWH and GFWH has a duplicated (active/standby) configuration. When an error
is detected in the active memory during BIOS startup, control is switched to the standby memory to restart the
BIOS.
Description
40 C122-B022-11EN