Cisco ASR 1000 Series Hardware Installation Manual page 114

Cisco DSP SPA for ASR 1000 Series Overview
Each SPA-DSP comprises of seven SP2603 DSP chips having a total of 21 DSP cores (three DSP cores
per SP2603). Based on the complexity of codec (low, medium, high), the density or maximum number
of channels supported per DSP core and maximum channels supported per SPA-DSP are defined.
Table 3-45
SPA-DSP, and the complexity type:
Table 3-45
Codec Complexity or Service
LC (Low complexity)
Voice/xcode
MC (Medium complexity)
Voice/xcode
HC (High Complexity)
Voice/xcode
ISAC Voice/xcode
Table 3-46
Table 3-46
Type of DSP
SPA (Product
ID)
SPA-DSP
The SPA-DSP supports transcoding for the codecs listed in
Table 3-47
Codec Name
g711alaw
g711ulaw
g722-64
g723r53
g723r63
g726r16
g726r24
g726r32
g726r40
Cisco ASR 1000 Series Aggregation Services Routers SIP and SPA Hardware Installation Guide
3-74
provides a matrix for the maximum number of channels supported on the DSP core and on
Codec Complexity and Density Supported Matrix
Maximum Supported Density per
DSP Core
43
28
17
8
provides hardware and software compatibility details for a SPA-DSP.
SPA-DSP Hardware and Software Compatibility
ASR1000 Router Route
Chassis Processor
Supported Supported
ASR 1002, RP1 and
ASR 1002-X, RP2
ASR 1004, and
ASR 1006
SPA-DSP-Supported Transcoding Codec List
Chapter 3 Overview: Cisco ASR 1000 Series Aggregation Services Routers SPAs
Power
Requirements
25 watts
Table
Codec Description
G.711 A Law 64000 bps
G.711 u Law 64000 bps
G722r64
G.723.1 5300 bps
G.723.1 6300 bps
G.726 16000 bps
G.726 24000 bps
G.726 32000 bps
G.726 40000 bps
Maximum Supported Density per
SPA-DSP
903
588
357
168
Minimum
Cisco IOS XE
SIPs ESPs Release
Supported Supported Supported
SIP-10 ESP-10 Cisco IOS XE
and and Release 3.2S
SIP-40 ESP-40
3-47.
OL-14126-15