Cisco WS C4224V 8FXS - 200Mbps Ethernet Switch Software Configuration Manual page 102

Access gateway switch
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Configuring T1 and E1 Interfaces
Task
Step 5
Enter controller configuration mode for the CT1/PRI
interface at the specified slot/port location.
This example configures a T1 interface in slot 1 and unit 0.
Step 6
Specify which end of the circuit provides clocking.
The clock source should be set to use internal clocking
only for testing the network or if the full T1 line is used as
the channel group. Only one end of the T1 line should be
set to internal.
Step 7
Specify the T1 framing type. The framing type defines the
control bits and data bits. Cisco supports super frame (SF)
and extended super frame (ESF) for T1s.
SF is used in channel-bank robbed bit signalling (RBS)
configurations. SF uses the framing bit to identify the
channel and voice-related signaling within the frame. SF
is not recommended for PRI configurations.
ESF is required for 64 kb operation on DS0s. ESF requires
2k-framing bits for synchronization. The remaining 6k is
used for error detection, CRC, and data link monitoring.
ESF is recommended for PRI configurations.
This example uses ESF.
Step 8
Specify the line code format. This is an encoding method
used to allow synchronous data to be transmitted in a
compatible format for T1 transmission. Common line
codes are RZ (return to zero), NRZ (non-return to zero),
binary zero 0 substitution (B8ZS), alternate mark
inversion (AMI), and HDB3 (high density bipolar order
3).
The most popular line-code scheme used in North
America is B8ZS. To maintain clock synchronization,
B8ZS replaces a string of eight binary 0s with variations.
B8ZS is more reliable than AMI, and it should be used
with PRI configurations.
Catalyst 4224 Access Gateway Switch Software Configuration Guide
4-14
Chapter 4
Configuring the Data Interfaces
Command
gateway(config)# controller
t1 1/0
gateway(config-controller)#
clock source line
gateway(config-controller)#
framing esf
gateway(config-controller)#
linecode b8zs
OL-2031-02

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