Smi And Nmi Routing; System Management Bus (Smb) - Intel SRMK2 - Server Platform - 0 MB RAM Technical Specifications

PCIIRQ12
PCIIRQ13
PCIIRQ14
PCIIRQ15

3.16.3 SMI and NMI Routing

There are numerous SMI/NMI sources. SMI/NMI sources are routed either to OSB4 or SIO
GPI input pins. Software must configure the OSB4 and SIO GPI input pins to control whether the
corresponding events will generate SMI, NMI or wake up events to the processors. The
SMI/NMI sources on the SRMK2 are shown in Table 20. Note that some inputs are the wired
OR of several sources. Signal names are in parenthesis.
SMI Source
Processor #0 IERR (IERR#0)
Processor #1 IERR (IERR#1)
Processor #0 Thermal Trip (THERMTRIP#0)
Processor #1 Thermal Trip (THERMTRIP#0)
CNB30LE Chipset PCI SERR# - used for ECC Errors (SALERT#)
Wired OR of HECETA #1 & #2 INT output and LAN 1 & 2 SMBALERT
output (SMBALERT#)
Gluechip's EXTSMI# output – used for +5VSB errors (EXTSMI#)
Debug NMI from Front Panel or NMI jumper (DBG_NMI#)
SIO SMI (SIO_SMI#)
SIO WAKE UP (SIO_WAKEUP#)
32-bit PCI SERR (P1_SERR#)
64-bit PCI SERR (P2_SERR#)
Wired OR of 32-bit PCI PME, External WOL, LAN1 PME, and LAN2 PME
(P1_PME#)
64-bit PCI PME (P2_PME#)
Wake on Ring (WOR#)

3.16.4 System Management Bus (SMB)

The SRMK2 baseboard supports a simple I
system resources. To implement this feature, the ServerWorks South Bridge device becomes the
master controller and communicates with several other devices in the system. Some of the
functions the processor can monitor though the SMB bus are the following: Fan Speed
(Tachometer), temperatures, voltage rails, LAN controllers, DIMM presence and size. Table 21
shows the address map of the various devices on the SM Bus.
Device
OSB4
LAN Controller 1
Intel ® SRMK2 Internet Server Technical Product Specification
P2S2_INTAC# (PCI64 Slot2 Interrupts A & C)
P2S2_INTBD# (PCI64 Slot2 Interrupts B & D)
Not Used
Not Used
Table 20: SRMK2 SMI and NMI sources
2 C compatible Bus to provide a method to manage
Table 21: SMB Bus Address Map
Master/Slave
Master Controller
Slave
OSB4 Input Pin SIO Input Pin
GEVENT_0
GEVENT_1
GEVENT_2
GEVENT_3
GEVENT_4
GEVENT_5
GEVENT_6
GEVENT_7
GEVENT_19
SIO_WAKEUP
SERR#
FRWP#
GEVNT_21
GP17
GP16
GP11
2
I C Address
N/A
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