Sonet/Sdh Vt Controllers; Figure 8: Stack For Cocx/Stmx Interfaces - Juniper JUNOSE 11.2.X PHYSICAL LAYER Configuration Manual

Copyright © 2010, Juniper Networks, Inc.

Figure 8: Stack for cOCx/STMx Interfaces

NOTE: For a detailed description of interface types and specifiers, see Interface Types
and Specifiers in JunosE Command Reference Guide. For information about interfaces,
see Planning Your Network in JunosE System Basics Configuration Guide.
The section layer manages the transport of STS/STM frames across the physical path.
This layer is responsible for frame alignment, scrambling, error detection, error monitoring,
signal reception, and signal regeneration.
The line layer manages the transport of SONET/SDH payloads, which are embedded
in a sequence of STS/STM frames in the physical medium. This layer is responsible for
multiplexing and synchronization.
The path layer maps the user payload into a SONET/SDH format siutable for the line
layer. This layer transports the actual network services (such as T1s and T3s) between
SONET/SDH multiplexing devices and provides end-to-end transmission.
When you configure a cOCx/STMx interface, be sure you understand its position in the
SONET or SDH hierarchy. This implementation of SONET and SDH uses the term path
to identify an STS-1 or STM-1 line. You must know how to identify the path for the
configuration and the higher-level controllers, such as T3 or unframed E1 over SONET
VT.

SONET/SDH VT Controllers

SONET/SDH VT on cOCx/STMx interfaces support these options:
A fractional T1 or E1 line
You assign channel groups of timeslots to configure fractional T1 or E1 over SONET/SDH
VT on cOCx/STMx interfaces. A channel group is the fraction of the T1 or E1 line and
comprises up to 24 T1 timeslots or up to 31 E1 timeslots. The default channel group
speed for both T1 and E1 is 64 Kbps; 56 Kbps is also available.
An unframed E1 line
Unframed E1 lines have no timeslots reserved for framing. The router creates one
channel for an unframed E1 line and assigns the number one to that channel.
Chapter 4: Configuring Channelized OCx/STMx Interfaces
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