Unit Specifications
Item
Instruction length
Types of instructions
Execution time
Program capacity
Input bits
Output bits
Work bits
Function expansion bits
MACRO instruction bits
High-speed Counter 0
PV
Special bits (SR area)
Temporary bits (TR area)
Holding bits (HR area)
Auxiliary bits (AR area)
Link bits (LR area)
Timers/counters
Data memory
Interrupt processing
Memory protection
Memory backup
Self-diagnostic functions
Program checks
40
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CQM1-CPU11-E/21-E
1 step per instruction, 1 to 4 words per instruction
117 instructions (14 basic types)
0.50 to 1.50 ms
Basic instructions:
24 ms (MOV instruction)
Special instructions:
3.2K words
00000 to
I/O total within
128 points (8
01115
words)
10000 to 11115
Bits not used as I/O bits can be used as work bits.
2720 bits min.
01200 to 09515
11200 to 19515
21600 to 21915
22400 to 22915
20000 to 21515: Used as work bits.
22000 to 22315: Used as work bits.
23200 to 23515: Used as work bits.
23600 to 23915: Used as work bits.
24000 to 24315: Used as work bits.
Inputs: 64 bits (IR 09600 to IR 09915)
Outputs: 64 bits (IR 19600 to IR 19915)
32 bits (IR 23000 to IR 23115)
192 bits (IR 24400 to IR 25515)
8 bits (TR0 to TR7)
1,600 bits (HR 0000 to HR 9915)
448 bits (AR0000 to AR 2715)
1,024 bits (LR 0000 to LR6315)
512 timers/counters (TIM/CNT 000 to TIM/CNT 511).Interrupt refreshing
possible for TIM 000 to TIM 015 (high-speed timer only).Interval timers 0
to 2 (interval timer 2 is used with the high-speed counter 0). High-speed
counter input.
1,024 words (DM 0000 to DM
1023) plus DM 6144 to DM 6655
(read-only)
External interrupts: 4
Scheduled interrupts: 3 (one of which can be used as a high-speed
counter interrupt and one of which can be used as pulse output)
HR, AR, and DM area contents; counter values; and clock (RTC) values maintained during
power interruptions.
Battery life is 5 years regardless of presence or absence of clock (RTC). Backup time varies
with ambient temperature.If BAT ERR indicator lights, replace the battery with a new one
within 1 week.Connect new battery within 5 min of removing battery.
CPU Unit failure (watchdog timer), I/O bus error, memory failure, battery error, and host link
error
No END instruction, programming errors (continuously checked during operation)
CQM1-CPU41
CQM1-CPU42
-EV1
-EV1
137 instructions (14 basic types)
7.2K words
I/O total within 256 points (12 words)
Analog SV area
6,144 words (DM 0000 to DM 6143) plus DM 6144 to
DM 6655 (read-only)
Section 2-6
CQM1-CPU43-EV1
/44-EV1
Used as work
bits.
High-speed
Counter 1,2 PV
Pulse output 1, 2
volume
(CPU43-EV1
only)
In addition to the
specifications on
the left,
high-speed
counter 1, 2
inputs (2 pts.)
In addition to the
specifications on
the left,
high-speed
counter 1, 2
interrupts (2 pts.)
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