Edp And Dp; Figure 8-1. Dp And Edp Connection Example - Nvidia Jetson Xavier NX Design Manual

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8.1

eDP and DP

Figure 8-1 shows the DP and eDP connection example.
Figure 8-1.
DP and eDP Connection Example
Jetson
SoC – HDMI/DP
DP
DP_AUX_CHx_HPD
DP_AUX_CHx_N
DP_AUX_CHx_P
HDMI_CEC
HDMI
HDMI_DPx_TXDP3
HDMI_Dx_TXDN3
HDMI_DPx_TXDP2
HDMI_DPx_TXDN2
HDMI_DPx_TXDP1
HDMI_DPx_TXDN1
HDMI_DPx_TXDP0
HDMI_DPx_TXDN0
Notes:
1. Level shifter required on DP0_HPD to avoid the pin from being driven when Jetson Xavier NX
is off. The level shifter must be non-inverting (preserve the polarity of the HPD signal from the
display). The reference design uses a BJT level shifter and a resistor divider is needed. See
the reference design if a similar approach will be used.
2. Load Switch enable is from powergood pin of main 3.3V supply.
NVIDIA Jetson Xavier NX
VDD_3V3_SYS
VDD_1V8
0/1
DPx_HPD
88/96
DPx_AUX_N
90/98
DPx_AUX_P
92/100
0.1uF
HDMI_CEC
94
0.1uF
DPx_TXD3_N
57/81
DPx_TXD3_P
59/83
0.1uF
0.1uF
DPx_TXD2_N
51/75
DPx_TXD2_P
53/77
0.1uF
0.1uF
DPx_TXD1_N
45/69
DPx_TXD1_P
47/71
0.1uF
0.1uF
DPx_TXD0_N
39/63
DPx_TXD0_P
41/65
0.1uF
Load Switch
IN
OUT
EN
3V3_IO_PG
Level Shifter
1.8V
3.3V
VDD_3V3_SYS
0.1uF
0.1uF
TPD4E 05U06
Display
VDD_3V3_EDP
DP
Conn
.
PWR
20
PWR_RET
19
HPD
18
AUXN
17
GND
16
AUXP
15
CEC_DP
14
MODE
13
LANE_3N
12
GND
11
LANE_3P
10
LANE_2N
9
GND
8
LANE_2P
7
LANE_1N
6
GND
5
LANE_1P
4
LANE_0N
3
GND
2
LANE_0P
1
DG-09693-001_v1.7 | 40

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