Edp And Dp Routing Guidelines; Figure 8-2. Edp And Dp Differential Main Link Topology; Table 8-3. Epd And Dp Main Link Signal Requirements Including Dp_Aux - Nvidia Jetson Xavier NX Design Manual

8.1.1

eDP and DP Routing Guidelines

The following routing requirements meet the eDP and DP routing guidelines.
Figure 8-2. eDP and DP Differential Main Link Topology
Jetson
SoC
P
DP
Pkg
Driver
N
Table 8-3. ePD and DP Main Link Signal Requirements Including
DP_AUX
Parameter
Specification
Max data rate / Min UI
RBR
HBR
HBR2
HBR3
Number of loads / topology
Termination
Electrical Spec
IL (min)
RBR
HBR
HBR2
HBR3
Resonance dip frequency (min)
HBR2
HBR3
TDR dip (min)
FEXT (max)
Impedance
Trace impedance Diff pair
Reference plane
NVIDIA Jetson Xavier NX
Common Mode
Chokes & ESD
eDP
Conn
Requirement Units
1.6 / 617 Gbps / ps
2.7 / 370
5.4 / 185
8.1 / 123
1 load
100 Ω
-0.7 dB @ 0.81GHz
-1.2 dB @ 1.35GHz
-2.4 dB @ 2.7GHz
-4.0 dB @ 4.05GHz
8 GHz
12
85 Ω
-40 dB @ DC
-30 dB @ 2.7GHz
-30 dB @ 2.7GHz
90 Ω (±15%)
85
GND
Notes
Per data lane
Point-Point, differential, unidirectional
On die at TX/RX
@ Tr-200ps (10%-90%)
See Figure 8-3 and TBD
100Ω is the spec. target.
85Ω is preferable as it can provide
better trace loss characteristic
performance. See Note 1.
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