Figure 12-5. Uart Connections; Table 12-8. Uart Signal Connections - Nvidia Jetson Xavier NX Design Manual

Figure 12-5. UART Connections

SoC – UART
UART2_TX
UART
UART2_RX
UART2_RTS_N
UART2_CTS_N
CAM
UART1_TX
UART1_RX
UART1_RTS_N
UART1_CTS_N
AO
UART3_TX
UART3_RX
Note: The buffers on UART0_TXD, UART0_RTS* and UART1_TXD are there to prevent
connected devices from changing the pin state during power-on. These pins are associated
with SoC Strapping pins.
Table 12-8. UART Signal Connections
Ball Name Type
UART[2:0]_TXD O
UART[2:0]_RXD I
UART[1:0]_CTS* I
UART[1:0]_RTS* O
NVIDIA Jetson Xavier NX
Jetson
1.8V
VCC
1.8V
1.8V
VCC
OE*
VCC
OE*
GND
GND
Termination Description
UART Transmit: Connect to peripheral RXD pin of device
UART Receive: Connect to peripheral TXD pin of device
UART Clear to Send: Connect to peripheral RTS pin of device
UART Request to Send: Connect to peripheral CTS pin of device
OE*
UART 0_TXD
GND
99
UART 0_RXD
101
UART 0_RTS*
103
UART 0_CTS*
105
UART 1_TXD
203
UART 1_RXD
205
UART 1_RTS*
207
UART 1_CTS*
209
UART 2_TXD
236
UART 2_RXD
238
Miscellaneous Interfaces
UART general (i.e.
M.2 Key E)
UART general
Debug UART
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