Chapter 14. Unused Interface Terminations; Unused Multi-Purpose Standard Cmos Pad Interfaces; Unused Dedicated Special Purpose Pad Interfaces; Table 14-1. Unused Mpio Pins And Pin Group - Nvidia Jetson Xavier NX Design Manual

Chapter 14. Unused Interface Terminations

14.1 Unused Multi-purpose Standard CMOS
Pad Interfaces
The following Jetson Xavier NX pins (and groups of pins) are Xavier MPIO pins that support
either special function IOs (SFIO) and/or GPIO capabilities. Any unused pins or portions of pin
groups listed in Table 14-1 that are not used can be left unconnected.
Table 14-1. Unused MPIO Pins and Pin Group
Jetson Xavier NX Pins / Pin Groups
FORCE_RECOVERY*
GPIO00
PCIE[1:0]_CLK/RST/CLKREQ/WAKE
GPIO xx
DP0_HPD, DP1_HPD, HDMI_CEC
CAM Control, Clock
14.2 Unused Dedicated Special Purpose
Pad Interfaces
See the Unused SFIO (Special Function I/O) interface pins section in the design checklist
attached to this design guide.
NVIDIA Jetson Xavier NX
Jetson Xavier NX Pins / Pin Groups
SDMMC
I2S
UART
I2C
SPI
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