Figure 8-8. Hdmi Clk And Data Topology; Table 8-5. Hdmi Interface Signal Routing Requirements - Nvidia Jetson Xavier NX Design Manual

Figure 8-8. HDMI Clk and Data Topology
Jetson
SoC
Notes:
1. RPD pad must be on the main trace. RPD and ACCAP must be on same layer.
2. Chokes (600 Ω @ 100 MHz) or narrow traces (1 uH @ DC-100 MHz) between pull-downs and FET are
chokes between pull-downs and FET are optional improvements for HDMI 2.0 operation.
3. The trace after the main route via should be routed on the top or bottom layer of the PCB, and either
with 100 ohm differential impedance, or as uncoupled 50 ohm SE traces.
4. RS series resistor is required to meet HDMI 2.0 compliance. See the RS section in Table 8-5 for details.

Table 8-5. HDMI Interface Signal Routing Requirements

Parameter
Specification
Max frequency / UI
Topology
Termination
At receiver
On-board
Electrical Specification
IL
resonance dip frequency
TDR dip
FEXT (PSFEXT)
Impedance
NVIDIA Jetson Xavier NX
AC
CAP
Main Route –
Seg A 0.1uF
Seg B
95-100Ω 100Ω*
* Note 3
0.1uF
95-100Ω 100Ω*
Seg C
PCB Vias
499Ω,
R
PD
1%
PCB Vias
MOD_SLEEP*
Requirement
5.94 / 168
Point to point
100
500
<= 1.7
<= 2
<= 3
< 6
> 12
>= 85
<= -50
<= -40
<= -40
IL/FEXT plot: See HDMI Guideline
Figure 8-9
Common Mode
R
S
Chokes & ESD
(See Note 4)
Seg D Seg E
100Ω* 100Ω*
* Note 3 * Note 3
100Ω* 100Ω*
See Note 1
499Ω,
1%
Choke or Trace
See Note 2
Units Notes
Gbps / ps Per lane – not total link bandwidth
Unidirectional, differential
Differential To 3.3V at receiver
Ω To GND near connector
dB @ 1GHz
dB @ 1.5GHz
dB @ 3GHz
dB @ 6GHz
GHz
Ω @ Tr=200ps 10%-90%. If TDR dip is 75~85ohm that
dip width should < 250ps
dB at DC PSNEXT is derived from an algebraic
dB at 3GHz summation of the individual NEXT effects
dB at 6GHz on each pair by the other pairs
TDR plot: See Figure 8-10
DG-09693-001_v1.7 | 47
Display
Seg F
100Ω*
HDMI
* Note 3
Conn
100Ω*