Figure 8-7. Hdmi Connection Example - Nvidia Jetson Xavier NX Design Manual

Figure 8-7. HDMI Connection Example
Jetson
SoC – HDMI/DP
DP
DP_AUX_CHx_HPD
DP_AUX_CHx_N
DP_AUX_CHx_P
HDMI_CEC
HDMI
HDMI_DPx_TXDP3
HDMI_Dx_TXDN3
HDMI_DPx_TXDP2
HDMI_DPx_TXDN2
HDMI_DPx_TXDP1
HDMI_DPx_TXDN1
HDMI_DPx_TXDP0
HDMI_DPx_TXDN0
Load Switch
VDD_3V3_SYS
IN
MOD_SLEEP*
EN
100kΩ
Notes:
1. Level shifters required on DDC/HPD. Xavier pads are not 5V tolerant and cannot directly meet HDMI VIL/VIH
requirements. HPD level shifter can be non-inverting or inverting. The HPD level shifter in the reference design
is inverting. The reference design uses a BJT level shifter and a resistor divider is needed. See the reference
design if a similar approach will be used.
2. If EMI/ESD devices are necessary, they must be tuned to minimize the impact to signal quality, which must
meet the timing and electrical requirements of the HDMI specification for the modes to be supported. See
requirements and recommendations in the related sections of the "HDMI Interface Signal Routing
Requirements" table (Table 8-5).
3. The DP1_TXx pads are native DP pads and require series AC capacitors (ACCAP) and pull-downs (RPD) to be
HDMI compliant. The 499Ω, 1% pull-downs must be disabled when Jetson Xavier NX is off or in sleep mode to
meet the HDMI VOFF requirement. The enable to the FET, enables the pull-downs when the HDMI interface is
to be used. Chokes between pull-downs and FET are optional improvements for HDMI 2.0 operation.
4. Series resistors RS are required. See the RS section in Table 8-5 for details.
5. See reference design for CEC level shifting/blocking circuit.
NVIDIA Jetson Xavier NX
VDD_5V_IN
VDD_1V8
0/1
DPx_HPD
88/96
DPx_AUX_N
90/98
DPx_AUX_P
92/100
HDMI_CEC
94
0.1uF
DPx_TXD3_N
57/81
0.1uF
DPx_TXD3_P
59/83
0.1uF
DPx_TXD2_N
51/75
0.1uF
DPx_TXD2_P
53/77
0.1uF
DPx_TXD1_N
45/69
0.1uF
DPx_TXD1_P
47/71
0.1uF
DPx_TXD0_N
39/63
0.1uF
DPx_TXD0_P
41/65
499Ω,1%
VDD_3V3_HDMI
OUT
10kΩ
VDD_5V0_HDMI_CON
Load Switch
IN OUT
EN
VDD_3V3_HDMI
0.1uF
Level Shifter
1.8V
Level Shifter
3.3V 5V
CEC Level
Shifter Circuit
(see note)
FET
G D
S
TPD4E 02B04 DQO R
5V
DDC/CEC_GND
R
S
R
CK_SHIELD
S
R
S
R
S
R
S
R
S
R
S
R
S
See
Note 4
DG-09693-001_v1.7 | 46
Display
HDMI
Type A
HP_DET
19
+5V
18
17
SDA
16
SCL
15
RESERVED
14
CEC
13
CK–
12
11
CK+
10
D0–
9
D0_SHIELD
8
D0+
7
D1–
6
D1_SHIELD
5
D1+
4
D2–
3
D2_SHIELD
2
D2+
1