Nvidia Jetson Xavier NX Design Manual page 60

Parameter
Example of a case where space is limited for
placing components.
AC Cap
Value
Max via distance from BGA
Location
Placement
PTH design
Micro-via design
Void
Pull-down Resistor (R ), choke/FET
PD
Value
Location.
Layer of placement
Choke between R and FET choke
PD
Max trace Rdc
Max trace length
Void
Common-mode Choke (Not recommended – only used if absolutely required for EMI issues)
See Chapter 18 for details on CMC if implemented.
ESD (On-chip protection diode can withstand 2kV HMM. External ESD is optional. Designs should include ESD footprint as a stuffing
option)
Max junction capacitance
(IO to GND)
Footprint
Location
Void
Series Resistor (R ) – Series resistor on N/P path for HDMI 2.0 (mandatory)
S
Value
Location
Void
Trace at Component Region
Value
Location
Trace entering the SMT pad
Trace between components
HDMI connector
NVIDIA Jetson Xavier NX
Requirement Units
Top: See Figure 8-12
0.1 uF
7.62 (52.5) mm (ps)
must be placed before pull-down
resistor
Place cap on bottom layer if main route
above core
Place cap on top layer if main route
below core
Not Restricted
GND (or PWR) void under/above the
cap is needed. Void size = SMT area +
1x dielectric height keepout distance
500
Must be placed after AC cap
Same layer as AC cap. The FET and
choke can be placed on the opposite
layer thru a PTH via
600 or Ω@100MHz
1 uH@DC-100MHz
≤20 mΩ
4 mm
GND/PWR void under/above cap is
preferred
0.35
Pad right on the net instead of trace
stub
After pull-down resistor/CMC and
before R
S
GND/PWR void under/above the cap is
needed. Void size = 1mm x 2mm for 1
pair
≤ 6
After all components and before HDMI
connector
GND/PWR void under/above the R
dielectric height keepout distance.
100
At component region (Microstrip)
One 45°
Uncoupled structure
Notes
Bottom: See Figure 8-12
The distance between the AC cap and the
HDMI connector is not restricted.
See Figure 8-13
Ω
Placement: See Figure 8-15
Can be choke or Trace. Recommended
option for HDMI2.0 HF1-9 improvement.
pF e.g. Texas Instruments
TPD4E02B04DQAR
See Figure 8-16
See Figure 8-17
Ω ± 10%. 0ohm is acceptable if the design
passes the HDMI2.0 HF1-9 test.
Otherwise, adjust the R
the HDMI2.0 tests pass: Eye diagram,
Vlow test and HF1-9 TDR test
device is needed. Void size = SMT area + 1x
S
Ω ± 10%
See Figure 8-18
See Figure 8-19
DG-09693-001_v1.7 | 49
Display
value to ensure
S