Usb; Table 6-3. Usb 3.2 And Pcie Lane Mapping - Nvidia Jetson Xavier NX Design Manual

Module Pin
Pin # Xavier Signal
Name
161 USBSS_RX_N PEX_RX1_N
163 USBSS_RX_P PEX_RX1_P
166 USBSS_TX_N PEX_TX1_N
168 USBSS_TX_P PEX_TX1_P
Notes:
1. In the Type/Dir column, Output is from Jetson Xavier NX. Input is to Jetson Xavier NX. Bidir is for Bidirectional signals.
2. The direction shown in this table for PEX_L4_RST* and PCIE_WAKE* signals is true when used for those PCIe functions.
Otherwise, if used as GPIOs, the direction is bidirectional.
Table 6-3 shows the mapping options for Jetson Xavier NX.
Table 6-3. USB 3.2 and PCIe Lane Mapping
Module Pin Names PCIE0_RX3_N/
PCIE0_TX3_N/
Xavier Lanes NVHS0 Lane 3 NVHS0 Lane 2 NVHS0 Lane 1 NVHS0 Lane 0

USB 3.2

PCIe
1 1x4 + 1x1 PCIe 0 lane 3
Controller #5
Recommended Usage
6.1 USB
Jetson Xavier NX support s up to three USB 2.0 ports and a single USB 3.2 port. Two examples
are shown in Figure 6-1 and Figure 6-2.
Note: Some non-compliant USB 3.x devices will not function correctly unless USB 3.2 Gen2 is
disabled.
The example shown in Figure 6-1 is for connections to a USB device only connector to be used
to support recovery mode (See Section 12.7 for details on recovery mode) or a USB device if
booted normally. A USB Micro B connector is shown in the example.
NVIDIA Jetson Xavier NX
Usage/Description
USB 3.2 Receive (USB 3.2 Ctrl #2)
USB 3.2 Transmit (USB 3.2 Ctrl #2)
PCIE0_RX2_N/ PCIE0_RX1_N/
P P PPCIE0_TX1_
PCIE0_TX2_N/
P P
PCIe 0 lane 2 PCIe 0 lane 1
Controller #5 Controller #5
PCIe x4 connector or device (i.e. M.2 Key M)
PCIE0_RX0_N/ PCIE1_RX0_N/P
PPCIE0_TX0_ PCIE1_TX0_N/P
N/P N/P
PCIe 0 lane 0
Controller #5
PCIe x1 connector
or device (i.e. M.2
USB and PCIe
Recommended Directio
Usage n
Input
USB 3.2
connector,
device or hub
Output
USBSS_RX_N/P
PEX Lane 11 PEX Lane 1
PCIe 1 lane 0 USB_SS Port #2
Controller #4
USB 3.2
connector, device
Key E) or hub
DG-09693-001_v1.7 | 19
Pin Type
USB 3.2
PHY
USB 3.2
PHY