Xilinx VC7203 User Manual page 58

Virtex-7 fpga gtx transceiver characterization board
Table of Contents

Advertisement

Appendix C: Master UCF Listing
NET
111_REFCLK1_N
NET
111_REFCLK1_P
NET
111_TX1_P
NET
111_RX1_P
NET
111_TX1_N
NET
111_RX1_N
NET
111_TX0_P
NET
111_RX0_P
NET
111_TX0_N
NET
111_RX0_N
NET
112_TX3_P
NET
112_RX3_P
NET
112_TX3_N
NET
112_RX3_N
NET
112_TX2_P
NET
112_RX2_P
NET
112_TX2_N
NET
112_REFCLK0_P
NET
112_RX2_N
NET
112_REFCLK0_N
NET
112_MGTRREF
NET
112_REFCLK1_N
NET
112_REFCLK1_P
NET
112_TX1_P
NET
112_RX1_P
NET
112_TX1_N
NET
112_RX1_N
NET
112_TX0_P
NET
112_RX0_P
NET
112_TX0_N
NET
112_RX0_N
NET
113_TX3_P
NET
113_RX3_P
NET
113_TX3_N
NET
113_RX3_N
NET
113_TX2_P
NET
113_RX2_P
NET
113_TX2_N
NET
113_REFCLK0_P
NET
113_RX2_N
NET
113_REFCLK0_N
NET
113_REFCLK1_N
NET
113_REFCLK1_P
NET
113_TX1_P
NET
113_RX1_P
NET
113_TX1_N
NET
113_RX1_N
NET
113_TX0_P
NET
113_RX0_P
NET
113_TX0_N
NET
113_RX0_N
NET
114_TX3_P
NET
114_RX3_P
NET
114_TX3_N
NET
114_RX3_N
NET
114_TX2_P
NET
114_RX2_P
NET
114_TX2_N
NET
114_REFCLK0_P
NET
114_RX2_N
NET
114_REFCLK0_N
NET
114_REFCLK1_N
NET
114_REFCLK1_P
NET
114_TX1_P
NET
114_RX1_P
NET
114_TX1_N
NET
114_RX1_N
NET
114_TX0_P
NET
114_RX0_P
NET
114_TX0_N
NET
114_RX0_N
NET
115_TX3_P
NET
115_RX3_P
NET
115_TX3_N
NET
115_RX3_N
NET
115_TX2_P
NET
115_RX2_P
NET
115_TX2_N
NET
115_REFCLK0_P
NET
115_RX2_N
NET
115_REFCLK0_N
58
LOC = BA9
LOC = BA10
LOC = BA2
LOC = BA6
LOC = BA1
LOC = BA5
LOC = BB4
LOC = BB8
LOC = BB3
LOC = BB7
LOC = AR2
LOC = AP8
LOC = AR1
LOC = AP7
LOC = AT4
LOC = AR6
LOC = AT3
LOC = AT8
LOC = AR5
LOC = AT7
LOC = W9
LOC = AU9
LOC = AU10
LOC = AU2
LOC = AU6
LOC = AU1
LOC = AU5
LOC = AV4
LOC = AV8
LOC = AV3
LOC = AV7
LOC = AL2
LOC = AJ6
LOC = AL1
LOC = AJ5
LOC = AM4
LOC = AL6
LOC = AM3
LOC = AH8
LOC = AL5
LOC = AH7
LOC = AK7
LOC = AK8
LOC = AN2
LOC = AM8
LOC = AN1
LOC = AM7
LOC = AP4
LOC = AN6
LOC = AP3
LOC = AN5
LOC = AG2
LOC = AD4
LOC = AG1
LOC = AD3
LOC = AH4
LOC = AE6
LOC = AH3
LOC = AD8
LOC = AE5
LOC = AD7
LOC = AF7
LOC = AF8
LOC = AJ2
LOC = AF4
LOC = AJ1
LOC = AF3
LOC = AK4
LOC = AG6
LOC = AK3
LOC = AG5
LOC = W2
LOC = Y4
LOC = W1
LOC = Y3
LOC = AA2
LOC = AA6
LOC = AA1
LOC = Y8
LOC = AA5
LOC = Y7
www.xilinx.com
; # Bank 111
; # Bank 111
; # Bank 111
; # Bank 111
; # Bank 111
; # Bank 111
; # Bank 111
; # Bank 111
; # Bank 111
; # Bank 111
; # Bank 112
; # Bank 112
; # Bank 112
; # Bank 112
; # Bank 112
; # Bank 112
; # Bank 112
; # Bank 112
; # Bank 112
; # Bank 112
; # Bank 112
; # Bank 112
; # Bank 112
; # Bank 112
; # Bank 112
; # Bank 112
; # Bank 112
; # Bank 112
; # Bank 112
; # Bank 112
; # Bank 112
; # Bank 113
; # Bank 113
; # Bank 113
; # Bank 113
; # Bank 113
; # Bank 113
; # Bank 113
; # Bank 113
; # Bank 113
; # Bank 113
; # Bank 113
; # Bank 113
; # Bank 113
; # Bank 113
; # Bank 113
; # Bank 113
; # Bank 113
; # Bank 113
; # Bank 113
; # Bank 113
; # Bank 114
; # Bank 114
; # Bank 114
; # Bank 114
; # Bank 114
; # Bank 114
; # Bank 114
; # Bank 114
; # Bank 114
; # Bank 114
; # Bank 114
; # Bank 114
; # Bank 114
; # Bank 114
; # Bank 114
; # Bank 114
; # Bank 114
; # Bank 114
; # Bank 114
; # Bank 114
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 115
; # Bank 115
VC7203 GTX Transceiver Characterization Board
UG957 (v1.0) October 10, 2012

Advertisement

Table of Contents
loading

Table of Contents