Xilinx VC7203 User Manual page 55

NET FMC2_LA27_P
NET FMC2_LA27_N
NET FMC2_LA28_P
NET FMC2_LA28_N
NET FMC2_LA18_CC_P
NET FMC2_LA18_CC_N
NET FMC2_LA17_CC_P
NET FMC2_LA17_CC_N
NET FMC2_CLK0_M2C_P
NET FMC2_CLK0_M2C_N
NET FMC2_CLK1_M2C_P
NET FMC2_CLK1_M2C_N
NET FMC2_LA29_P
NET FMC2_LA29_N
NET FMC2_LA30_P
NET FMC2_LA30_N
NET FMC2_LA31_P
NET FMC2_LA31_N
NET FMC2_LA32_P
NET FMC2_LA32_N
NET FMC2_LA33_P
NET FMC2_LA33_N
NET FMC2_HA07_P
NET FMC2_HA07_N
NET FMC2_HA08_P
NET FMC2_HA08_N
NET FMC2_HA09_P
NET FMC2_HA09_N
NET FMC2_HA10_P
NET FMC2_HA10_N
NET FMC2_HA11_P
NET FMC2_HA11_N
NET IO_25_VRP_35
NET IO_0_VRN_36
NET FMC2_HB01_P
NET FMC2_HB01_N
NET FMC2_HB02_P
NET FMC2_HB02_N
NET FMC2_HB03_P
NET FMC2_HB03_N
NET FMC2_HB04_P
NET FMC2_HB04_N
NET FMC2_HB05_P
NET FMC2_HB05_N
NET FMC2_HB07_P
NET FMC2_HB07_N
NET FMC2_HB08_P
NET FMC2_HB08_N
NET FMC2_HB09_P
NET FMC2_HB09_N
NET FMC2_HB10_P
NET FMC2_HB10_N
NET FMC2_HB11_P
NET FMC2_HB11_N
NET FMC2_HB06_CC_P
NET FMC2_HB06_CC_N
NET FMC2_HB00_CC_P
NET FMC2_HB00_CC_N
NET FMC2_CLK2_BIDIR_P
NET FMC2_CLK2_BIDIR_N
NET FMC2_CLK3_BIDIR_P
NET FMC2_CLK3_BIDIR_N
NET FMC2_HB12_P
NET FMC2_HB12_N
NET FMC2_HB13_P
NET FMC2_HB13_N
NET FMC2_HB14_P
NET FMC2_HB14_N
NET FMC2_HB15_P
NET FMC2_HB15_N
NET FMC2_HB16_P
NET FMC2_HB16_N
NET FMC2_HA12_P
NET FMC2_HA12_N
NET FMC2_HA13_P
NET FMC2_HA13_N
NET FMC2_HA14_P
NET FMC2_HA14_N
NET FMC2_HA15_P
NET FMC2_HA15_N
NET FMC2_HA16_P
VC7203 GTX Transceiver Characterization Board
UG957 (v1.0) October 10, 2012
LOC = E33 | IOSTANDARD=LVCMOS18; # Bank
LOC = D33 | IOSTANDARD=LVCMOS18; # Bank
LOC = C33 | IOSTANDARD=LVCMOS18; # Bank
LOC = C34 | IOSTANDARD=LVCMOS18; # Bank
LOC = D35 | IOSTANDARD=LVCMOS18; # Bank
LOC = D36 | IOSTANDARD=LVCMOS18; # Bank
LOC = C35 | IOSTANDARD=LVCMOS18; # Bank
LOC = C36 | IOSTANDARD=LVCMOS18; # Bank
LOC = E34 | IOSTANDARD=LVCMOS18; # Bank
LOC = E35 | IOSTANDARD=LVCMOS18; # Bank
LOC = D37 | IOSTANDARD=LVCMOS18; # Bank
LOC = D38 | IOSTANDARD=LVCMOS18; # Bank
LOC = G32 | IOSTANDARD=LVCMOS18; # Bank
LOC = F32 | IOSTANDARD=LVCMOS18; # Bank
LOC = F36 | IOSTANDARD=LVCMOS18; # Bank
LOC = F37 | IOSTANDARD=LVCMOS18; # Bank
LOC = F34 | IOSTANDARD=LVCMOS18; # Bank
LOC = F35 | IOSTANDARD=LVCMOS18; # Bank
LOC = H33 | IOSTANDARD=LVCMOS18; # Bank
LOC = G33 | IOSTANDARD=LVCMOS18; # Bank
LOC = E37 | IOSTANDARD=LVCMOS18; # Bank
LOC = E38 | IOSTANDARD=LVCMOS18; # Bank
LOC = G36 | IOSTANDARD=LVCMOS18; # Bank
LOC = G37 | IOSTANDARD=LVCMOS18; # Bank
LOC = F39 | IOSTANDARD=LVCMOS18; # Bank
LOC = E39 | IOSTANDARD=LVCMOS18; # Bank
LOC = J37 | IOSTANDARD=LVCMOS18; # Bank
LOC = J38 | IOSTANDARD=LVCMOS18; # Bank
LOC = H38 | IOSTANDARD=LVCMOS18; # Bank
LOC = G38 | IOSTANDARD=LVCMOS18; # Bank
LOC = J36 | IOSTANDARD=LVCMOS18; # Bank
LOC = H36 | IOSTANDARD=LVCMOS18; # Bank
LOC = G34 | IOSTANDARD=LVCMOS18; # Bank
LOC = M23 | IOSTANDARD=LVCMOS18; # Bank
LOC = H24 | IOSTANDARD=LVCMOS18; # Bank
LOC = G24 | IOSTANDARD=LVCMOS18; # Bank
LOC = J21 | IOSTANDARD=LVCMOS18; # Bank
LOC = H21 | IOSTANDARD=LVCMOS18; # Bank
LOC = H25 | IOSTANDARD=LVCMOS18; # Bank
LOC = H26 | IOSTANDARD=LVCMOS18; # Bank
LOC = G21 | IOSTANDARD=LVCMOS18; # Bank
LOC = G22 | IOSTANDARD=LVCMOS18; # Bank
LOC = G26 | IOSTANDARD=LVCMOS18; # Bank
LOC = G27 | IOSTANDARD=LVCMOS18; # Bank
LOC = H23 | IOSTANDARD=LVCMOS18; # Bank
LOC = G23 | IOSTANDARD=LVCMOS18; # Bank
LOC = G28 | IOSTANDARD=LVCMOS18; # Bank
LOC = G29 | IOSTANDARD=LVCMOS18; # Bank
LOC = K28 | IOSTANDARD=LVCMOS18; # Bank
LOC = J28 | IOSTANDARD=LVCMOS18; # Bank
LOC = H28 | IOSTANDARD=LVCMOS18; # Bank
LOC = H29 | IOSTANDARD=LVCMOS18; # Bank
LOC = K27 | IOSTANDARD=LVCMOS18; # Bank
LOC = J27 | IOSTANDARD=LVCMOS18; # Bank
LOC = K24 | IOSTANDARD=LVCMOS18; # Bank
LOC = K25 | IOSTANDARD=LVCMOS18; # Bank
LOC = J25 | IOSTANDARD=LVCMOS18; # Bank
LOC = J26 | IOSTANDARD=LVCMOS18; # Bank
LOC = M24 | IOSTANDARD=LVCMOS18; # Bank
LOC = L24 | IOSTANDARD=LVCMOS18; # Bank
LOC = K23 | IOSTANDARD=LVCMOS18; # Bank
LOC = J23 | IOSTANDARD=LVCMOS18; # Bank
LOC = M22 | IOSTANDARD=LVCMOS18; # Bank
LOC = L22 | IOSTANDARD=LVCMOS18; # Bank
LOC = L25 | IOSTANDARD=LVCMOS18; # Bank
LOC = L26 | IOSTANDARD=LVCMOS18; # Bank
LOC = K22 | IOSTANDARD=LVCMOS18; # Bank
LOC = J22 | IOSTANDARD=LVCMOS18; # Bank
LOC = M21 | IOSTANDARD=LVCMOS18; # Bank
LOC = L21 | IOSTANDARD=LVCMOS18; # Bank
LOC = P21 | IOSTANDARD=LVCMOS18; # Bank
LOC = N21 | IOSTANDARD=LVCMOS18; # Bank
LOC = P25 | IOSTANDARD=LVCMOS18; # Bank
LOC = P26 | IOSTANDARD=LVCMOS18; # Bank
LOC = P22 | IOSTANDARD=LVCMOS18; # Bank
LOC = P23 | IOSTANDARD=LVCMOS18; # Bank
LOC = N25 | IOSTANDARD=LVCMOS18; # Bank
LOC = N26 | IOSTANDARD=LVCMOS18; # Bank
LOC = N23 | IOSTANDARD=LVCMOS18; # Bank
LOC = N24 | IOSTANDARD=LVCMOS18; # Bank
LOC = M27 | IOSTANDARD=LVCMOS18; # Bank
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VC7203 Board UCF Listing
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