Xilinx VC7203 User Manual page 54

Appendix C: Master UCF Listing
NET IO_L18N_T2_33
NET IO_L19P_T3_33
NET IO_L19N_T3_VREF_33
NET IO_L20P_T3_33
NET IO_L20N_T3_33
NET IO_L21P_T3_DQS_33
NET IO_L21N_T3_DQS_33
NET IO_L22P_T3_33
NET IO_L22N_T3_33
NET IO_L23P_T3_33
NET IO_L23N_T3_33
NET IO_L24P_T3_33
NET IO_L24N_T3_33
NET IO_25_VRP_33
NET IO_0_VRN_34
NET FMC2_LA02_P
NET FMC2_LA02_N
NET FMC2_LA03_P
NET FMC2_LA03_N
NET FMC2_LA04_P
NET FMC2_LA04_N
NET FMC2_LA05_P
NET FMC2_LA05_N
NET FMC2_LA06_P
NET FMC2_LA06_N
NET FMC2_LA07_P
NET FMC2_LA07_N
NET FMC2_LA08_P
NET FMC2_LA08_N
NET FMC2_LA09_P
NET FMC2_LA09_N
NET FMC2_LA10_P
NET FMC2_LA10_N
NET FMC2_LA11_P
NET FMC2_LA11_N
NET FMC2_LA01_CC_P
NET FMC2_LA01_CC_N
NET FMC2_LA00_CC_P
NET FMC2_LA00_CC_N
NET FMC2_HA00_CC_P
NET FMC2_HA00_CC_N
NET FMC2_HA01_CC_P
NET FMC2_HA01_CC_N
NET FMC2_LA12_P
NET FMC2_LA12_N
NET FMC2_LA13_P
NET FMC2_LA13_N
NET FMC2_LA14_P
NET FMC2_LA14_N
NET FMC2_LA15_P
NET FMC2_LA15_N
NET FMC2_LA16_P
NET FMC2_LA16_N
NET FMC2_HA02_P
NET FMC2_HA02_N
NET FMC2_HA03_P
NET FMC2_HA03_N
NET FMC2_HA04_P
NET FMC2_HA04_N
NET FMC2_HA05_P
NET FMC2_HA05_N
NET FMC2_HA06_P
NET FMC2_HA06_N
NET IO_25_VRP_34
NET FMC2_PRSNT_M2C_L
NET FMC2_LA19_P
NET FMC2_LA19_N
NET FMC2_LA20_P
NET FMC2_LA20_N
NET FMC2_LA21_P
NET FMC2_LA21_N
NET FMC2_LA22_P
NET FMC2_LA22_N
NET FMC2_LA23_P
NET FMC2_LA23_N
NET FMC2_LA24_P
NET FMC2_LA24_N
NET FMC2_LA25_P
NET FMC2_LA25_N
NET FMC2_LA26_P
NET FMC2_LA26_N
54
LOC = AV24 | IOSTANDARD=LVCMOS18; # Bank
LOC = AY23 | IOSTANDARD=LVCMOS18; # Bank
LOC = AY22 | IOSTANDARD=LVCMOS18; # Bank
LOC = AY25 | IOSTANDARD=LVCMOS18; # Bank
LOC = BA25 | IOSTANDARD=LVCMOS18; # Bank
LOC = BA22 | IOSTANDARD=LVCMOS18; # Bank
LOC = BB22 | IOSTANDARD=LVCMOS18; # Bank
LOC = AY24 | IOSTANDARD=LVCMOS18; # Bank
LOC = BA24 | IOSTANDARD=LVCMOS18; # Bank
LOC = BA21 | IOSTANDARD=LVCMOS18; # Bank
LOC = BB21 | IOSTANDARD=LVCMOS18; # Bank
LOC = BB24 | IOSTANDARD=LVCMOS18; # Bank
LOC = BB23 | IOSTANDARD=LVCMOS18; # Bank
LOC = AN20 | IOSTANDARD=LVCMOS18; # Bank
LOC = R29 | IOSTANDARD=LVCMOS18; # Bank
LOC = K35 | IOSTANDARD=LVCMOS18; # Bank
LOC = J35 | IOSTANDARD=LVCMOS18; # Bank
LOC = J32 | IOSTANDARD=LVCMOS18; # Bank
LOC = J33 | IOSTANDARD=LVCMOS18; # Bank
LOC = K33 | IOSTANDARD=LVCMOS18; # Bank
LOC = K34 | IOSTANDARD=LVCMOS18; # Bank
LOC = L34 | IOSTANDARD=LVCMOS18; # Bank
LOC = L35 | IOSTANDARD=LVCMOS18; # Bank
LOC = M33 | IOSTANDARD=LVCMOS18; # Bank
LOC = M34 | IOSTANDARD=LVCMOS18; # Bank
LOC = H34 | IOSTANDARD=LVCMOS18; # Bank
LOC = H35 | IOSTANDARD=LVCMOS18; # Bank
LOC = K29 | IOSTANDARD=LVCMOS18; # Bank
LOC = K30 | IOSTANDARD=LVCMOS18; # Bank
LOC = J30 | IOSTANDARD=LVCMOS18; # Bank
LOC = H30 | IOSTANDARD=LVCMOS18; # Bank
LOC = L29 | IOSTANDARD=LVCMOS18; # Bank
LOC = L30 | IOSTANDARD=LVCMOS18; # Bank
LOC = J31 | IOSTANDARD=LVCMOS18; # Bank
LOC = H31 | IOSTANDARD=LVCMOS18; # Bank
LOC = M32 | IOSTANDARD=LVCMOS18; # Bank
LOC = L32 | IOSTANDARD=LVCMOS18; # Bank
LOC = L31 | IOSTANDARD=LVCMOS18; # Bank
LOC = K32 | IOSTANDARD=LVCMOS18; # Bank
LOC = N30 | IOSTANDARD=LVCMOS18; # Bank
LOC = M31 | IOSTANDARD=LVCMOS18; # Bank
LOC = P30 | IOSTANDARD=LVCMOS18; # Bank
LOC = N31 | IOSTANDARD=LVCMOS18; # Bank
LOC = M28 | IOSTANDARD=LVCMOS18; # Bank
LOC = M29 | IOSTANDARD=LVCMOS18; # Bank
LOC = R28 | IOSTANDARD=LVCMOS18; # Bank
LOC = P28 | IOSTANDARD=LVCMOS18; # Bank
LOC = N28 | IOSTANDARD=LVCMOS18; # Bank
LOC = N29 | IOSTANDARD=LVCMOS18; # Bank
LOC = R30 | IOSTANDARD=LVCMOS18; # Bank
LOC = P31 | IOSTANDARD=LVCMOS18; # Bank
LOC = U31 | IOSTANDARD=LVCMOS18; # Bank
LOC = T31 | IOSTANDARD=LVCMOS18; # Bank
LOC = V30 | IOSTANDARD=LVCMOS18; # Bank
LOC = V31 | IOSTANDARD=LVCMOS18; # Bank
LOC = T29 | IOSTANDARD=LVCMOS18; # Bank
LOC = T30 | IOSTANDARD=LVCMOS18; # Bank
LOC = W30 | IOSTANDARD=LVCMOS18; # Bank
LOC = W31 | IOSTANDARD=LVCMOS18; # Bank
LOC = V29 | IOSTANDARD=LVCMOS18; # Bank
LOC = U29 | IOSTANDARD=LVCMOS18; # Bank
LOC = Y29 | IOSTANDARD=LVCMOS18; # Bank
LOC = Y30 | IOSTANDARD=LVCMOS18; # Bank
LOC = U28 | IOSTANDARD=LVCMOS18; # Bank
LOC = G31 | IOSTANDARD=LVCMOS18; # Bank
LOC = B36 | IOSTANDARD=LVCMOS18; # Bank
LOC = A37 | IOSTANDARD=LVCMOS18; # Bank
LOC = B34 | IOSTANDARD=LVCMOS18; # Bank
LOC = A34 | IOSTANDARD=LVCMOS18; # Bank
LOC = B39 | IOSTANDARD=LVCMOS18; # Bank
LOC = A39 | IOSTANDARD=LVCMOS18; # Bank
LOC = A35 | IOSTANDARD=LVCMOS18; # Bank
LOC = A36 | IOSTANDARD=LVCMOS18; # Bank
LOC = C38 | IOSTANDARD=LVCMOS18; # Bank
LOC = C39 | IOSTANDARD=LVCMOS18; # Bank
LOC = B37 | IOSTANDARD=LVCMOS18; # Bank
LOC = B38 | IOSTANDARD=LVCMOS18; # Bank
LOC = E32 | IOSTANDARD=LVCMOS18; # Bank
LOC = D32 | IOSTANDARD=LVCMOS18; # Bank
LOC = B32 | IOSTANDARD=LVCMOS18; # Bank
LOC = B33 | IOSTANDARD=LVCMOS18; # Bank
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VC7203 GTX Transceiver Characterization Board
UG957 (v1.0) October 10, 2012