Xilinx VC7203 User Manual page 53

NET FMC3_LA21_P
NET FMC3_LA21_N
NET FMC3_LA22_P
NET FMC3_LA22_N
NET FMC3_LA23_P
NET FMC3_LA23_N
NET FMC3_LA24_P
NET FMC3_LA24_N
NET FMC3_LA25_P
NET FMC3_LA25_N
NET FMC3_LA26_P
NET FMC3_LA26_N
NET FMC3_LA27_P
NET FMC3_LA27_N
NET FMC3_LA28_P
NET FMC3_LA28_N
NET FMC3_LA18_CC_P
NET FMC3_LA18_CC_N
NET FMC3_LA17_CC_P
NET FMC3_LA17_CC_N
NET FMC3_CLK0_M2C_P
NET FMC3_CLK0_M2C_N
NET FMC3_CLK1_M2C_P
NET FMC3_CLK1_M2C_N
NET FMC3_LA29_P
NET FMC3_LA29_N
NET FMC3_LA30_P
NET FMC3_LA30_N
NET FMC3_LA31_P
NET FMC3_LA31_N
NET FMC3_LA32_P
NET FMC3_LA32_N
NET FMC3_LA33_P
NET FMC3_LA33_N
NET FMC3_HA06_P
NET FMC3_HA06_N
NET FMC3_HA07_P
NET FMC3_HA07_N
NET FMC3_HA08_P
NET FMC3_HA08_N
NET FMC3_HA09_P
NET FMC3_HA09_N
NET FMC3_HA10_P
NET FMC3_HA10_N
NET IO_25_VRP_32
NET IO_0_VRN_33
NET IO_L1P_T0_33
NET IO_L1N_T0_33
NET IO_L2P_T0_33
NET IO_L2N_T0_33
NET IO_L3P_T0_DQS_33
NET IO_L3N_T0_DQS_33
NET IO_L4P_T0_33
NET IO_L4N_T0_33
NET IO_L5P_T0_33
NET IO_L5N_T0_33
NET IO_L6P_T0_33
NET IO_L6N_T0_VREF_33
NET IO_L7P_T1_33
NET IO_L7N_T1_33
NET IO_L8P_T1_33
NET IO_L8N_T1_33
NET IO_L9P_T1_DQS_33
NET IO_L9N_T1_DQS_33
NET IO_L10P_T1_33
NET IO_L10N_T1_33
NET IO_L11P_T1_SRCC_33
NET IO_L11N_T1_SRCC_33
NET IO_L12P_T1_MRCC_33
NET IO_L12N_T1_MRCC_33
NET IO_L13P_T2_MRCC_33
NET IO_L13N_T2_MRCC_33
NET IO_L14P_T2_SRCC_33
NET IO_L14N_T2_SRCC_33
NET IO_L15P_T2_DQS_33
NET IO_L15N_T2_DQS_33
NET IO_L16P_T2_33
NET IO_L16N_T2_33
NET IO_L17P_T2_33
NET IO_L17N_T2_33
NET IO_L18P_T2_33
VC7203 GTX Transceiver Characterization Board
UG957 (v1.0) October 10, 2012
LOC = AM18 | IOSTANDARD=LVCMOS18; # Bank
LOC = AM17 | IOSTANDARD=LVCMOS18; # Bank
LOC = AK19 | IOSTANDARD=LVCMOS18; # Bank
LOC = AK18 | IOSTANDARD=LVCMOS18; # Bank
LOC = AM16 | IOSTANDARD=LVCMOS18; # Bank
LOC = AN16 | IOSTANDARD=LVCMOS18; # Bank
LOC = AJ18 | IOSTANDARD=LVCMOS18; # Bank
LOC = AJ17 | IOSTANDARD=LVCMOS18; # Bank
LOC = AP18 | IOSTANDARD=LVCMOS18; # Bank
LOC = AP17 | IOSTANDARD=LVCMOS18; # Bank
LOC = AP20 | IOSTANDARD=LVCMOS18; # Bank
LOC = AR19 | IOSTANDARD=LVCMOS18; # Bank
LOC = AN19 | IOSTANDARD=LVCMOS18; # Bank
LOC = AN18 | IOSTANDARD=LVCMOS18; # Bank
LOC = AR18 | IOSTANDARD=LVCMOS18; # Bank
LOC = AR17 | IOSTANDARD=LVCMOS18; # Bank
LOC = AU18 | IOSTANDARD=LVCMOS18; # Bank
LOC = AV18 | IOSTANDARD=LVCMOS18; # Bank
LOC = AT17 | IOSTANDARD=LVCMOS18; # Bank
LOC = AU17 | IOSTANDARD=LVCMOS18; # Bank
LOC = AY18 | IOSTANDARD=LVCMOS18; # Bank
LOC = AY17 | IOSTANDARD=LVCMOS18; # Bank
LOC = AW18 | IOSTANDARD=LVCMOS18; # Bank
LOC = AW17 | IOSTANDARD=LVCMOS18; # Bank
LOC = AU19 | IOSTANDARD=LVCMOS18; # Bank
LOC = AV19 | IOSTANDARD=LVCMOS18; # Bank
LOC = AT20 | IOSTANDARD=LVCMOS18; # Bank
LOC = AT19 | IOSTANDARD=LVCMOS18; # Bank
LOC = AV16 | IOSTANDARD=LVCMOS18; # Bank
LOC = AW16 | IOSTANDARD=LVCMOS18; # Bank
LOC = AT16 | IOSTANDARD=LVCMOS18; # Bank
LOC = AU16 | IOSTANDARD=LVCMOS18; # Bank
LOC = BB19 | IOSTANDARD=LVCMOS18; # Bank
LOC = BB18 | IOSTANDARD=LVCMOS18; # Bank
LOC = AV20 | IOSTANDARD=LVCMOS18; # Bank
LOC = AW20 | IOSTANDARD=LVCMOS18; # Bank
LOC = BA17 | IOSTANDARD=LVCMOS18; # Bank
LOC = BB17 | IOSTANDARD=LVCMOS18; # Bank
LOC = AY20 | IOSTANDARD=LVCMOS18; # Bank
LOC = BA20 | IOSTANDARD=LVCMOS18; # Bank
LOC = BA16 | IOSTANDARD=LVCMOS18; # Bank
LOC = BB16 | IOSTANDARD=LVCMOS18; # Bank
LOC = AY19 | IOSTANDARD=LVCMOS18; # Bank
LOC = BA19 | IOSTANDARD=LVCMOS18; # Bank
LOC = AP16 | IOSTANDARD=LVCMOS18; # Bank
LOC = AL24 | IOSTANDARD=LVCMOS18; # Bank
LOC = AJ23 | IOSTANDARD=LVCMOS18; # Bank
LOC = AK23 | IOSTANDARD=LVCMOS18; # Bank
LOC = AK20 | IOSTANDARD=LVCMOS18; # Bank
LOC = AL20 | IOSTANDARD=LVCMOS18; # Bank
LOC = AJ22 | IOSTANDARD=LVCMOS18; # Bank
LOC = AK22 | IOSTANDARD=LVCMOS18; # Bank
LOC = AL21 | IOSTANDARD=LVCMOS18; # Bank
LOC = AM21 | IOSTANDARD=LVCMOS18; # Bank
LOC = AJ21 | IOSTANDARD=LVCMOS18; # Bank
LOC = AJ20 | IOSTANDARD=LVCMOS18; # Bank
LOC = AL22 | IOSTANDARD=LVCMOS18; # Bank
LOC = AM22 | IOSTANDARD=LVCMOS18; # Bank
LOC = AM24 | IOSTANDARD=LVCMOS18; # Bank
LOC = AN24 | IOSTANDARD=LVCMOS18; # Bank
LOC = AM23 | IOSTANDARD=LVCMOS18; # Bank
LOC = AN23 | IOSTANDARD=LVCMOS18; # Bank
LOC = AP23 | IOSTANDARD=LVCMOS18; # Bank
LOC = AP22 | IOSTANDARD=LVCMOS18; # Bank
LOC = AN21 | IOSTANDARD=LVCMOS18; # Bank
LOC = AP21 | IOSTANDARD=LVCMOS18; # Bank
LOC = AR23 | IOSTANDARD=LVCMOS18; # Bank
LOC = AR22 | IOSTANDARD=LVCMOS18; # Bank
LOC = AT22 | IOSTANDARD=LVCMOS18; # Bank
LOC = AU22 | IOSTANDARD=LVCMOS18; # Bank
LOC = AU23 | IOSTANDARD=LVCMOS18; # Bank
LOC = AV23 | IOSTANDARD=LVCMOS18; # Bank
LOC = AW23 | IOSTANDARD=LVCMOS18; # Bank
LOC = AW22 | IOSTANDARD=LVCMOS18; # Bank
LOC = AT21 | IOSTANDARD=LVCMOS18; # Bank
LOC = AU21 | IOSTANDARD=LVCMOS18; # Bank
LOC = AR24 | IOSTANDARD=LVCMOS18; # Bank
LOC = AT24 | IOSTANDARD=LVCMOS18; # Bank
LOC = AV21 | IOSTANDARD=LVCMOS18; # Bank
LOC = AW21 | IOSTANDARD=LVCMOS18; # Bank
LOC = AU24 | IOSTANDARD=LVCMOS18; # Bank
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VC7203 Board UCF Listing
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