Xilinx VC709 User Manual page 74

Appendix C: Master UCF Listing
74
## 1866 MT/s performance
## Must use 233.33333MHz clock for MIG design
## DDR3 FPGA VCCO = 1.5V
##
## Bank 37 = Data groups 7:4
## Bank 38 = Address & Control group
## Bank 39 = Data groups 3:0
##
#############################################
##
## DDR3 SODIMM A clocks and clock enables:
## CLK0 = rank 0 and CLK1 = rank 1
## Single rank SODIMM installed
##
NET DDR3_A_CLK[1]_P
NET DDR3_A_CLK[1]_N
NET DDR3_A_CLK[0]_P
NET DDR3_A_CLK[0]_N
NET DDR3_A_CKE[0]
NET DDR3_A_CKE[1]
##
## DDR3 SODIMM A selects:
## S0 = rank 0
## S1 = rank 1
##
NET DDR3_A_S[0]_B
NET DDR3_A_S[1]_B
##
## DDR3 SODIMM A controls:
##
NET DDR3_A_RAS_B
NET DDR3_A_CAS_B
NET DDR3_A_WE_B
NET DDR3_A_ODT[0]
NET DDR3_A_ODT[1]
NET DDR3_A_TEMP_EVENT_B
NET DDR3_A_RESET_B
##
## DDR3 SODIMM A addresses:
##
NET DDR3_A_A[0]
NET DDR3_A_A[1]
NET DDR3_A_A[2]
NET DDR3_A_A[3]
NET DDR3_A_A[4]
NET DDR3_A_A[5]
NET DDR3_A_A[6]
NET DDR3_A_A[7]
NET DDR3_A_A[8]
NET DDR3_A_A[9]
NET DDR3_A_A[10]
NET DDR3_A_A[11]
NET DDR3_A_A[12]
NET DDR3_A_A[13]
NET DDR3_A_A[14]
NET DDR3_A_A[15]
##
## DDR3 SODIMM A bank addresses:
##
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LOC = G19 ; # IO_L11P_T1_SRCC_38
LOC = F19 ; # IO_L11N_T1_SRCC_38
LOC = E19 ; # IO_L12P_T1_MRCC_38
LOC = E18 ; # IO_L12N_T1_MRCC_38
LOC = K19 ; # IO_L14P_T2_SRCC_38
LOC = J18 ; # IO_L14N_T2_SRCC_38
LOC = J17 ; # IO_L16N_T2_38
LOC = J20 ; # IO_L17P_T2_38
LOC = E20 ; # IO_L15N_T2_DQS_38
LOC = K17 ; # IO_L16P_T2_38
LOC = F20 ; # IO_L15P_T2_DQS_38
LOC = H20 ; # IO_L17N_T2_38
LOC = H18 ; # IO_L18P_T2_38
LOC = G17 ; # IO_L18N_T2_38
LOC = P18 ; # IO_L19P_T3_38
LOC = A20 ; # IO_L3P_T0_DQS_38
LOC = B19 ; # IO_L1N_T0_38
LOC = C20 ; # IO_L7N_T1_38
LOC = A19 ; # IO_L3N_T0_DQS_38
LOC = A17 ; # IO_L4N_T0_38
LOC = A16 ; # IO_L2P_T0_38
LOC = D20 ; # IO_L7P_T1_38
LOC = C18 ; # IO_L6P_T0_38
LOC = D17 ; # IO_L10N_T1_38
LOC = C19 ; # IO_L1P_T0_38
LOC = B21 ; # IO_L5P_T0_38
LOC = B17 ; # IO_L4P_T0_38
LOC = A15 ; # IO_L2N_T0_38
LOC = A21 ; # IO_L5N_T0_38
LOC = F17 ; # IO_L8P_T1_38
LOC = E17 ; # IO_L8N_T1_38
UG887 (v1.0) February 4, 2013
VC709 Evaluation Board